From 4dc80c1793d2a068b6b7c4f76c8b084972d0e234 Mon Sep 17 00:00:00 2001 From: baldurk Date: Thu, 30 Jun 2022 15:41:45 +0100 Subject: [PATCH] Use non-legacy ASIC to generate AMDIL * This may break on drivers old enough to not recognise the first non-legacy ASIC, but that is much rarer than new drivers that have dropped support for the old ones. --- renderdoc/driver/ihv/amd/amd_isa.cpp | 2 +- renderdoc/driver/ihv/amd/amd_isa_win32.cpp | 4 ++-- util/test/tests/GL/GL_Shader_ISA.py | 2 +- 3 files changed, 4 insertions(+), 4 deletions(-) diff --git a/renderdoc/driver/ihv/amd/amd_isa.cpp b/renderdoc/driver/ihv/amd/amd_isa.cpp index 40541867d..16df9e9cb 100644 --- a/renderdoc/driver/ihv/amd/amd_isa.cpp +++ b/renderdoc/driver/ihv/amd/amd_isa.cpp @@ -380,7 +380,7 @@ rdcstr DisassembleGLSL(ShaderStage stage, const bytebuf &shaderBytes, const rdcs // dummy values if(!found) { - const asic &a = asicInfo[0]; + const asic &a = asicInfo[legacyAsicCount]; cmdLine += StringFormat::Fmt("%d;%d;", a.chipFamily, a.chipRevision); } diff --git a/renderdoc/driver/ihv/amd/amd_isa_win32.cpp b/renderdoc/driver/ihv/amd/amd_isa_win32.cpp index c884eaead..b480b059c 100644 --- a/renderdoc/driver/ihv/amd/amd_isa_win32.cpp +++ b/renderdoc/driver/ihv/amd/amd_isa_win32.cpp @@ -115,8 +115,8 @@ rdcstr DisassembleDXBC(const bytebuf &shaderBytes, const rdcstr &target) bool amdil = false; if(target == "AMDIL") { - in.chipFamily = asicInfo[0].chipFamily; - in.chipRevision = asicInfo[0].chipRevision; + in.chipFamily = asicInfo[legacyAsicCount].chipFamily; + in.chipRevision = asicInfo[legacyAsicCount].chipRevision; amdil = true; } diff --git a/util/test/tests/GL/GL_Shader_ISA.py b/util/test/tests/GL/GL_Shader_ISA.py index 6691ef49b..81ab7c5c2 100644 --- a/util/test/tests/GL/GL_Shader_ISA.py +++ b/util/test/tests/GL/GL_Shader_ISA.py @@ -27,7 +27,7 @@ class GL_Shader_ISA(rdtest.TestCase): # Generic testing can't do much, we just ensure that we can successfully get a non-empty disassembly string for isa in isas: # The AMD disassembler does an audible ping when it fails, so skip ones we know won't work - if not is_amd and ('GCN (' in isa or 'RDNA (' in isa or isa == 'AMDIL'): + if not is_amd and ('GCN (' in isa or 'RDNA (' in isa or 'RDNA2 (' in isa or isa == 'AMDIL'): rdtest.log.print("Skipping {} as we know it will fail".format(isa)) continue