From 915339042e9cb266dad876c71cf6ec2b0148b890 Mon Sep 17 00:00:00 2001 From: Jake Turner Date: Sun, 18 May 2025 07:05:35 +0100 Subject: [PATCH] Set DXBC GSM and Temp registers to have rows = 0 and columns = 0 --- renderdoc/driver/shaders/dxbc/dxbc_bytecode.cpp | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/renderdoc/driver/shaders/dxbc/dxbc_bytecode.cpp b/renderdoc/driver/shaders/dxbc/dxbc_bytecode.cpp index bf0a4051d..09116b8f8 100644 --- a/renderdoc/driver/shaders/dxbc/dxbc_bytecode.cpp +++ b/renderdoc/driver/shaders/dxbc/dxbc_bytecode.cpp @@ -732,6 +732,8 @@ void Program::SetupRegisterFile(rdcarray ®isters) const for(size_t i = 0; i < m_IndexTempSizes.size(); i++) { registers.push_back(makeReg(GetRegisterName(TYPE_INDEXABLE_TEMP, (uint32_t)i))); + registers.back().rows = 0; + registers.back().columns = 0; registers.back().members.resize(m_IndexTempSizes[i]); for(uint32_t t = 0; t < m_IndexTempSizes[i]; t++) registers.back().members[t] = makeReg(StringFormat::Fmt("[%u]", t)); @@ -755,6 +757,8 @@ void Program::SetupRegisterFile(rdcarray ®isters) const continue; registers.push_back(makeReg(GetRegisterName(TYPE_THREAD_GROUP_SHARED_MEMORY, (uint32_t)i))); + registers.back().rows = 0; + registers.back().columns = 0; registers.back().members.resize(m_GroupsharedTempSizes[i].second); // nice case, groupshared is raw or structured with stride less than a register, we can treat // it as a simple array @@ -776,6 +780,8 @@ void Program::SetupRegisterFile(rdcarray ®isters) const for(uint32_t t = 0; t < m_GroupsharedTempSizes[i].second; t++) { registers.back().members[t] = makeReg(StringFormat::Fmt("[%u]", t)); + registers.back().members[t].rows = 0; + registers.back().members[t].columns = 0; registers.back().members[t].members.resize(AlignUp4(m_GroupsharedTempSizes[i].first) / 4);