diff --git a/renderdoc/driver/shaders/spirv/all_capabilities.txt b/renderdoc/driver/shaders/spirv/all_capabilities.txt new file mode 100644 index 000000000..919368b96 --- /dev/null +++ b/renderdoc/driver/shaders/spirv/all_capabilities.txt @@ -0,0 +1,276 @@ +0 Matrix +1 Shader +2 Geometry +3 Tessellation +4 Addresses +5 Linkage +6 Kernel +7 Vector16 +8 Float16Buffer +9 Float16 +10 Float64 +11 Int64 +12 Int64Atomics +13 ImageBasic +14 ImageReadWrite +15 ImageMipmap +17 Pipes +18 Groups +19 DeviceEnqueue +20 LiteralSampler +21 AtomicStorage +22 Int16 +23 TessellationPointSize +24 GeometryPointSize +25 ImageGatherExtended +27 StorageImageMultisample +28 UniformBufferArrayDynamicIndexing +29 SampledImageArrayDynamicIndexing +30 StorageBufferArrayDynamicIndexing +31 StorageImageArrayDynamicIndexing +32 ClipDistance +33 CullDistance +34 ImageCubeArray +35 SampleRateShading +36 ImageRect +37 SampledRect +38 GenericPointer +39 Int8 +40 InputAttachment +41 SparseResidency +42 MinLod +43 Sampled1D +44 Image1D +45 SampledCubeArray +46 SampledBuffer +47 ImageBuffer +48 ImageMSArray +49 StorageImageExtendedFormats +50 ImageQuery +51 DerivativeControl +52 InterpolationFunction +53 TransformFeedback +54 GeometryStreams +55 StorageImageReadWithoutFormat +56 StorageImageWriteWithoutFormat +57 MultiViewport +58 SubgroupDispatch +59 NamedBarrier +60 PipeStorage +61 GroupNonUniform +62 GroupNonUniformVote +63 GroupNonUniformArithmetic +64 GroupNonUniformBallot +65 GroupNonUniformShuffle +66 GroupNonUniformShuffleRelative +67 GroupNonUniformClustered +68 GroupNonUniformQuad +69 ShaderLayer +70 ShaderViewportIndex +71 UniformDecoration +4165 CoreBuiltinsARM +4166 TileImageColorReadAccessEXT +4167 TileImageDepthReadAccessEXT +4168 TileImageStencilReadAccessEXT +4174 TensorsARM +4175 StorageTensorArrayDynamicIndexingARM +4176 StorageTensorArrayNonUniformIndexingARM +4191 GraphARM +4201 CooperativeMatrixLayoutsARM +4212 Float8EXT +4213 Float8CooperativeMatrixEXT +4422 FragmentShadingRateKHR +4423 SubgroupBallotKHR +4427 DrawParameters +4428 WorkgroupMemoryExplicitLayoutKHR +4429 WorkgroupMemoryExplicitLayout8BitAccessKHR +4430 WorkgroupMemoryExplicitLayout16BitAccessKHR +4431 SubgroupVoteKHR +4433 StorageBuffer16BitAccess +4434 UniformAndStorageBuffer16BitAccess +4435 StoragePushConstant16 +4436 StorageInputOutput16 +4437 DeviceGroup +4439 MultiView +4441 VariablePointersStorageBuffer +4442 VariablePointers +4445 AtomicStorageOps +4447 SampleMaskPostDepthCoverage +4448 StorageBuffer8BitAccess +4449 UniformAndStorageBuffer8BitAccess +4450 StoragePushConstant8 +4464 DenormPreserve +4465 DenormFlushToZero +4466 SignedZeroInfNanPreserve +4467 RoundingModeRTE +4468 RoundingModeRTZ +4471 RayQueryProvisionalKHR +4472 RayQueryKHR +4473 UntypedPointersKHR +4478 RayTraversalPrimitiveCullingKHR +4479 RayTracingKHR +4484 TextureSampleWeightedQCOM +4485 TextureBoxFilterQCOM +4486 TextureBlockMatchQCOM +4495 TileShadingQCOM +4496 CooperativeMatrixConversionQCOM +4498 TextureBlockMatch2QCOM +5008 Float16ImageAMD +5009 ImageGatherBiasLodAMD +5010 FragmentMaskAMD +5013 StencilExportEXT +5015 ImageReadWriteLodAMD +5016 Int64ImageEXT +5055 ShaderClockKHR +5067 ShaderEnqueueAMDX +5087 QuadControlKHR +5112 Int4TypeINTEL +5114 Int4CooperativeMatrixINTEL +5116 BFloat16TypeKHR +5117 BFloat16DotProductKHR +5118 BFloat16CooperativeMatrixKHR +5249 SampleMaskOverrideCoverageNV +5251 GeometryShaderPassthroughNV +5254 ShaderViewportIndexLayerEXT +5255 ShaderViewportMaskNV +5259 ShaderStereoViewNV +5260 PerViewAttributesNV +5265 FragmentFullyCoveredEXT +5266 MeshShadingNV +5282 ImageFootprintNV +5283 MeshShadingEXT +5284 FragmentBarycentricKHR +5288 ComputeDerivativeGroupQuadsKHR +5291 FragmentDensityEXT +5297 GroupNonUniformPartitionedNV +5301 ShaderNonUniform +5302 RuntimeDescriptorArray +5303 InputAttachmentArrayDynamicIndexing +5304 UniformTexelBufferArrayDynamicIndexing +5305 StorageTexelBufferArrayDynamicIndexing +5306 UniformBufferArrayNonUniformIndexing +5307 SampledImageArrayNonUniformIndexing +5308 StorageBufferArrayNonUniformIndexing +5309 StorageImageArrayNonUniformIndexing +5310 InputAttachmentArrayNonUniformIndexing +5311 UniformTexelBufferArrayNonUniformIndexing +5312 StorageTexelBufferArrayNonUniformIndexing +5336 RayTracingPositionFetchKHR +5340 RayTracingNV +5341 RayTracingMotionBlurNV +5345 VulkanMemoryModel +5346 VulkanMemoryModelDeviceScope +5347 PhysicalStorageBufferAddresses +5350 ComputeDerivativeGroupLinearKHR +5353 RayTracingProvisionalKHR +5357 CooperativeMatrixNV +5363 FragmentShaderSampleInterlockEXT +5372 FragmentShaderShadingRateInterlockEXT +5373 ShaderSMBuiltinsNV +5378 FragmentShaderPixelInterlockEXT +5379 DemoteToHelperInvocation +5380 DisplacementMicromapNV +5381 RayTracingOpacityMicromapEXT +5383 ShaderInvocationReorderNV +5390 BindlessTextureNV +5391 RayQueryPositionFetchKHR +5394 CooperativeVectorNV +5404 AtomicFloat16VectorNV +5409 RayTracingDisplacementMicromapNV +5414 RawAccessChainsNV +5418 RayTracingSpheresGeometryNV +5419 RayTracingLinearSweptSpheresGeometryNV +5426 Shader64BitIndexingEXT +5430 CooperativeMatrixReductionsNV +5431 CooperativeMatrixConversionsNV +5432 CooperativeMatrixPerElementOperationsNV +5433 CooperativeMatrixTensorAddressingNV +5434 CooperativeMatrixBlockLoadsNV +5435 CooperativeVectorTrainingNV +5437 RayTracingClusterAccelerationStructureNV +5439 TensorAddressingNV +5568 SubgroupShuffleINTEL +5569 SubgroupBufferBlockIOINTEL +5570 SubgroupImageBlockIOINTEL +5579 SubgroupImageMediaBlockIOINTEL +5582 RoundToInfinityINTEL +5583 FloatingPointModeINTEL +5584 IntegerFunctions2INTEL +5603 FunctionPointersINTEL +5604 IndirectReferencesINTEL +5606 AsmINTEL +5612 AtomicFloat32MinMaxEXT +5613 AtomicFloat64MinMaxEXT +5616 AtomicFloat16MinMaxEXT +5617 VectorComputeINTEL +5619 VectorAnyINTEL +5629 ExpectAssumeKHR +5696 SubgroupAvcMotionEstimationINTEL +5697 SubgroupAvcMotionEstimationIntraINTEL +5698 SubgroupAvcMotionEstimationChromaINTEL +5817 VariableLengthArrayINTEL +5821 FunctionFloatControlINTEL +5824 FPGAMemoryAttributesALTERA +5837 FPFastMathModeINTEL +5844 ArbitraryPrecisionIntegersALTERA +5845 ArbitraryPrecisionFloatingPointALTERA +5886 UnstructuredLoopControlsINTEL +5888 FPGALoopControlsALTERA +5892 KernelAttributesINTEL +5897 FPGAKernelAttributesINTEL +5898 FPGAMemoryAccessesALTERA +5904 FPGAClusterAttributesALTERA +5906 LoopFuseALTERA +5908 FPGADSPControlALTERA +5910 MemoryAccessAliasingINTEL +5916 FPGAInvocationPipeliningAttributesALTERA +5920 FPGABufferLocationALTERA +5922 ArbitraryPrecisionFixedPointALTERA +5935 USMStorageClassesALTERA +5939 RuntimeAlignedAttributeALTERA +5943 IOPipesALTERA +5945 BlockingPipesALTERA +5948 FPGARegALTERA +6016 DotProductInputAll +6017 DotProductInput4x8Bit +6018 DotProductInput4x8BitPacked +6019 DotProduct +6020 RayCullMaskKHR +6022 CooperativeMatrixKHR +6024 ReplicatedCompositesEXT +6025 BitInstructions +6026 GroupNonUniformRotateKHR +6029 FloatControls2 +6030 FMAKHR +6033 AtomicFloat32AddEXT +6034 AtomicFloat64AddEXT +6089 LongCompositesINTEL +6094 OptNoneEXT +6095 AtomicFloat16AddEXT +6114 DebugInfoModuleINTEL +6115 BFloat16ConversionINTEL +6141 SplitBarrierINTEL +6144 ArithmeticFenceEXT +6150 FPGAClusterAttributesV2ALTERA +6161 FPGAKernelAttributesv2INTEL +6162 TaskSequenceALTERA +6169 FPMaxErrorINTEL +6171 FPGALatencyControlALTERA +6174 FPGAArgumentInterfacesALTERA +6187 GlobalVariableHostAccessINTEL +6189 GlobalVariableFPGADecorationsALTERA +6220 SubgroupBufferPrefetchINTEL +6228 Subgroup2DBlockIOINTEL +6229 Subgroup2DBlockTransformINTEL +6230 Subgroup2DBlockTransposeINTEL +6236 SubgroupMatrixMultiplyAccumulateINTEL +6241 TernaryBitwiseFunctionINTEL +6243 UntypedVariableLengthArrayINTEL +6245 SpecConditionalINTEL +6246 FunctionVariantsINTEL +6400 GroupUniformArithmeticKHR +6425 TensorFloat32RoundingINTEL +6427 MaskedGatherScatterINTEL +6441 CacheControlsINTEL +6460 RegisterLimitsINTEL +6528 BindlessImagesINTEL diff --git a/renderdoc/driver/shaders/spirv/all_exts.txt b/renderdoc/driver/shaders/spirv/all_exts.txt new file mode 100644 index 000000000..de39a3944 --- /dev/null +++ b/renderdoc/driver/shaders/spirv/all_exts.txt @@ -0,0 +1,155 @@ +SPV_KHR_16bit_storage +SPV_KHR_8bit_storage +SPV_KHR_bfloat16 +SPV_KHR_bit_instructions +SPV_KHR_compute_shader_derivatives +SPV_KHR_cooperative_matrix +SPV_KHR_device_group +SPV_KHR_expect_assume +SPV_KHR_float_controls +SPV_KHR_float_controls2 +SPV_KHR_fma +SPV_KHR_fragment_shader_barycentric +SPV_KHR_fragment_shading_rate +SPV_KHR_integer_dot_product +SPV_KHR_linkonce_odr +SPV_KHR_maximal_reconvergence +SPV_KHR_multiview +SPV_KHR_no_integer_wrap_decoration +SPV_KHR_non_semantic_info +SPV_KHR_physical_storage_buffer +SPV_KHR_post_depth_coverage +SPV_KHR_quad_control +SPV_KHR_ray_cull_mask +SPV_KHR_ray_query +SPV_KHR_ray_tracing +SPV_KHR_ray_tracing_position_fetch +SPV_KHR_relaxed_extended_instruction +SPV_KHR_shader_atomic_counter_ops +SPV_KHR_shader_ballot +SPV_KHR_shader_clock +SPV_KHR_shader_draw_parameters +SPV_KHR_storage_buffer_storage_class +SPV_KHR_subgroup_rotate +SPV_KHR_subgroup_uniform_control_flow +SPV_KHR_subgroup_vote +SPV_KHR_terminate_invocation +SPV_KHR_uniform_group_instructions +SPV_KHR_untyped_pointers +SPV_KHR_variable_pointers +SPV_KHR_vulkan_memory_model +SPV_KHR_workgroup_memory_explicit_layout +SPV_EXT_arithmetic_fence +SPV_EXT_demote_to_helper_invocation +SPV_EXT_descriptor_indexing +SPV_EXT_float8 +SPV_EXT_fragment_fully_covered +SPV_EXT_fragment_invocation_density +SPV_EXT_fragment_shader_interlock +SPV_EXT_image_raw10_raw12 +SPV_EXT_mesh_shader +SPV_EXT_opacity_micromap +SPV_EXT_optnone +SPV_EXT_physical_storage_buffer +SPV_EXT_relaxed_printf_string_address_space +SPV_EXT_replicated_composites +SPV_EXT_shader_64bit_indexing +SPV_EXT_shader_atomic_float_add +SPV_EXT_shader_atomic_float_min_max +SPV_EXT_shader_atomic_float16_add +SPV_EXT_shader_image_int64 +SPV_EXT_shader_stencil_export +SPV_EXT_shader_tile_image +SPV_EXT_shader_viewport_index_layer +SPV_ALTERA_arbitrary_precision_fixed_point +SPV_ALTERA_arbitrary_precision_floating_point +SPV_ALTERA_arbitrary_precision_integers +SPV_ALTERA_blocking_pipes +SPV_ALTERA_fpga_argument_interfaces +SPV_ALTERA_fpga_buffer_location +SPV_ALTERA_fpga_cluster_attributes +SPV_ALTERA_fpga_dsp_control +SPV_ALTERA_fpga_invocation_pipelining_attributes +SPV_ALTERA_fpga_latency_control +SPV_ALTERA_fpga_loop_controls +SPV_ALTERA_fpga_memory_accesses +SPV_ALTERA_fpga_memory_attributes +SPV_ALTERA_fpga_reg +SPV_ALTERA_global_variable_fpga_decorations +SPV_ALTERA_io_pipes +SPV_ALTERA_loop_fuse +SPV_ALTERA_runtime_aligned +SPV_ALTERA_task_sequence +SPV_ALTERA_usm_storage_classes +SPV_AMD_gcn_shader +SPV_AMD_gpu_shader_half_float +SPV_AMD_gpu_shader_half_float_fetch +SPV_AMD_gpu_shader_int16 +SPV_AMD_shader_ballot +SPV_AMD_shader_early_and_late_fragment_tests +SPV_AMD_shader_explicit_vertex_parameter +SPV_AMD_shader_fragment_mask +SPV_AMD_shader_image_load_store_lod +SPV_AMD_shader_trinary_minmax +SPV_AMD_texture_gather_bias_lod +SPV_AMDX_shader_enqueue +SPV_ARM_cooperative_matrix_layouts +SPV_ARM_core_builtins +SPV_ARM_graph +SPV_ARM_tensors +SPV_GOOGLE_decorate_string +SPV_GOOGLE_hlsl_functionality1 +SPV_GOOGLE_user_type +SPV_HUAWEI_cluster_culling_shader +SPV_HUAWEI_subpass_shading +SPV_INTEL_2d_block_io +SPV_INTEL_bfloat16_conversion +SPV_INTEL_cache_controls +SPV_INTEL_device_side_avc_motion_estimation +SPV_INTEL_fp_fast_math_mode +SPV_INTEL_fp_max_error +SPV_INTEL_global_variable_host_access +SPV_INTEL_int4 +SPV_INTEL_kernel_attributes +SPV_INTEL_long_composites +SPV_INTEL_masked_gather_scatter +SPV_INTEL_maximum_registers +SPV_INTEL_media_block_io +SPV_INTEL_shader_integer_functions2 +SPV_INTEL_split_barrier +SPV_INTEL_subgroups +SPV_INTEL_subgroup_buffer_prefetch +SPV_INTEL_subgroup_matrix_multiply_accumulate +SPV_INTEL_tensor_float32_conversion +SPV_INTEL_ternary_bitwise_function +SPV_INTEL_unstructured_loop_controls +SPV_INTEL_variable_length_array +SPV_NV_bindless_texture +SPV_NV_cluster_acceleration_structure +SPV_NV_compute_shader_derivatives +SPV_NV_cooperative_matrix +SPV_NV_cooperative_matrix2 +SPV_NV_cooperative_vector +SPV_NV_displacement_micromap +SPV_NV_fragment_shader_barycentric +SPV_NV_geometry_shader_passthrough +SPV_NV_linear_swept_spheres +SPV_NV_mesh_shader +SPV_NV_raw_access_chains +SPV_NV_ray_tracing +SPV_NV_ray_tracing_motion_blur +SPV_NV_sample_mask_override_coverage +SPV_NV_shader_atomic_fp16_vector +SPV_NV_shader_image_footprint +SPV_NV_shader_invocation_reorder +SPV_NV_shader_sm_builtins +SPV_NV_shader_subgroup_partitioned +SPV_NV_shading_rate +SPV_NV_stereo_view_rendering +SPV_NV_tensor_addressing +SPV_NV_viewport_array2 +SPV_NVX_multiview_per_view_attributes +SPV_QCOM_cooperative_matrix_conversion +SPV_QCOM_image_processing +SPV_QCOM_image_processing2 +SPV_QCOM_tile_shading diff --git a/renderdoc/driver/shaders/spirv/check_extensions.sh b/renderdoc/driver/shaders/spirv/check_extensions.sh new file mode 100644 index 000000000..a0cc18d59 --- /dev/null +++ b/renderdoc/driver/shaders/spirv/check_extensions.sh @@ -0,0 +1,39 @@ +#!/bin/bash + +# not sorted because the registry lists them in extension number order +grep -o '\[SPV_.*\]' spirv_registry.md | tr -d '[] \t' > all_exts.txt +unix2dos -q all_exts.txt + +# sorted by enum value +sed -n '/kind.*"Capability",$/,/"category"/p' spirv.core.grammar.json | + grep 'enumerant\>\|value' | paste -sd ' \n' | awk '{print $6" "$3}' | + tr -d '",' | sort -n > all_capabilities.txt +unix2dos -q all_capabilities.txt + +export IFS=" +" +for I in $(cat all_exts.txt | dos2unix); do + if ! grep -q '`'"$I"'`' extension_support.md; then + echo "Extension $I isn't in extension_support.md"; + fi +done + +for I in $(cat all_capabilities.txt | awk '{print $2}'); do + if ! grep -q '`'"$I"'`' extension_support.md; then + echo "Capability $I isn't in extension_support.md"; + fi +done + +for I in $(rg SPV_ extension_support.md | egrep -o 'SPV_[A-Z0-9a-z_]*'); do + if ! grep -q $I spirv_registry.md; then + echo "Extension $I is in extension_support.md but not the registry"; + fi; +done + +for I in $(egrep '^ ' extension_support.md | tr -d '* `'); do + if ! egrep -q "\"enumerant\".*\"$I\"" spirv.core.grammar.json; then + if ! egrep -q "\"aliases\".*\"$I\"" spirv.core.grammar.json; then + echo "Capability $I is in extension_support.md but not the grammar"; + fi; + fi; +done diff --git a/renderdoc/driver/shaders/spirv/extension_support.md b/renderdoc/driver/shaders/spirv/extension_support.md new file mode 100644 index 000000000..633a910de --- /dev/null +++ b/renderdoc/driver/shaders/spirv/extension_support.md @@ -0,0 +1,531 @@ +# SPIR-V extension and capability support + +This is a list of the currently supported SPIR-V extensions and capabilities in the shader debugger, in a bit more readable format than the code. + +Maintainers can update this file by updating `spirv.core.grammar.json` and `spirv_registry.md` (the SPIRV-Registry README.md) in this folder and running `./check_extensions.sh` which will output any new extensions that haven't been filed in a category below. This will also update `all_exts.txt` and `all_capabilities.txt` which needs to be committed too when this file is updated to keep things in sync. + +Each extension references the relevant capabilities below it. + +# Supported + +* `SPIR-V 1.0` + * `AtomicStorage` + * `ClipDistance` + * `CullDistance` + * `DerivativeControl` + * `Float16` + * `Float64` + * `Geometry` + * `GeometryPointSize` + * `GeometryStreams` + * `Image1D` + * `ImageBuffer` + * `ImageCubeArray` + * `ImageGatherExtended` + * `ImageMSArray` + * `ImageQuery` + * `ImageRect` + * `InputAttachment` + * `Int16` + * `Int64` + * `Int64Atomics` + * `Int8` + * `Matrix` + * `MinLod` + * `MultiViewport` + * `Sampled1D` + * `SampledBuffer` + * `SampledCubeArray` + * `SampledImageArrayDynamicIndexing` + * `SampledRect` + * `SampleRateShading` + * `Shader` + * `StorageBufferArrayDynamicIndexing` + * `StorageImageArrayDynamicIndexing` + * `StorageImageExtendedFormats` + * `StorageImageMultisample` + * `StorageImageReadWithoutFormat` + * `StorageImageWriteWithoutFormat` + * `Tessellation` + * `TessellationPointSize` + * `TransformFeedback` + * `UniformBufferArrayDynamicIndexing` +* `SPIR-V 1.1` +* `SPIR-V 1.2` +* `SPIR-V 1.3` + * `DrawParameters` + * `GroupNonUniform` + * `GroupNonUniformArithmetic` + * `GroupNonUniformBallot` + * `GroupNonUniformClustered` + * `GroupNonUniformQuad` + * `GroupNonUniformShuffle` + * `GroupNonUniformShuffleRelative` + * `GroupNonUniformVote` +* `SPIR-V 1.4` + * `SignedZeroInfNanPreserve` +* `SPIR-V 1.5` + * `InputAttachmentArrayDynamicIndexing` + * `InputAttachmentArrayNonUniformIndexing` + * `RuntimeDescriptorArray` + * `SampledImageArrayNonUniformIndexing` + * `ShaderLayer` + * `ShaderNonUniform` + * `ShaderViewportIndex` + * `StorageBufferArrayNonUniformIndexing` + * `StorageImageArrayNonUniformIndexing` + * `StorageTexelBufferArrayDynamicIndexing` + * `StorageTexelBufferArrayNonUniformIndexing` + * `UniformBufferArrayNonUniformIndexing` + * `UniformTexelBufferArrayDynamicIndexing` + * `UniformTexelBufferArrayNonUniformIndexing` + * `VulkanMemoryModel` + * `VulkanMemoryModelDeviceScope` +* `SPIR-V 1.6` + * `DemoteToHelperInvocation` + * `UniformDecoration` +* `SPV_KHR_16bit_storage` + * `StorageBuffer16BitAccess` + * `StorageInputOutput16` + * `StoragePushConstant16` + * `StorageUniform16` + * `StorageUniformBufferBlock16` + * `UniformAndStorageBuffer16BitAccess` +* `SPV_KHR_8bit_storage` + * `StorageBuffer8BitAccess` + * `StoragePushConstant8` + * `UniformAndStorageBuffer8BitAccess` +* `SPV_KHR_bit_instructions` + * `BitInstructions` +* `SPV_KHR_device_group` + * `DeviceGroup` +* `SPV_KHR_expect_assume` + * `ExpectAssumeKHR` +* `SPV_KHR_float_controls` +* `SPV_KHR_maximal_reconvergence` +* `SPV_KHR_multiview` + * `MultiView` +* `SPV_KHR_no_integer_wrap_decoration` +* `SPV_KHR_non_semantic_info` +* `SPV_KHR_physical_storage_buffer` + * `PhysicalStorageBufferAddresses` +* `SPV_KHR_post_depth_coverage` + * `SampleMaskPostDepthCoverage` +* `SPV_KHR_quad_control` + * `QuadControlKHR` +* `SPV_KHR_relaxed_extended_instruction` +* `SPV_KHR_shader_atomic_counter_ops` + * `AtomicStorageOps` +* `SPV_KHR_shader_ballot` + * `SubgroupBallotKHR` +* `SPV_KHR_shader_clock` + * `ShaderClockKHR` +* `SPV_KHR_shader_draw_parameters` +* `SPV_KHR_storage_buffer_storage_class` +* `SPV_KHR_subgroup_rotate` + * `GroupNonUniformRotateKHR` +* `SPV_KHR_subgroup_uniform_control_flow` +* `SPV_KHR_subgroup_vote` + * `SubgroupVoteKHR` +* `SPV_KHR_terminate_invocation` +* `SPV_KHR_vulkan_memory_model` + * `VulkanMemoryModelKHR` + * `VulkanMemoryModelDeviceScopeKHR` +* `SPV_EXT_demote_to_helper_invocation` + * `DemoteToHelperInvocationEXT` +* `SPV_EXT_descriptor_indexing` + * `InputAttachmentArrayDynamicIndexingEXT` + * `InputAttachmentArrayNonUniformIndexingEXT` + * `RuntimeDescriptorArrayEXT` + * `SampledImageArrayNonUniformIndexingEXT` + * `ShaderNonUniformEXT` + * `StorageBufferArrayNonUniformIndexingEXT` + * `StorageImageArrayNonUniformIndexingEXT` + * `StorageTexelBufferArrayDynamicIndexingEXT` + * `StorageTexelBufferArrayNonUniformIndexingEXT` + * `UniformBufferArrayNonUniformIndexingEXT` + * `UniformTexelBufferArrayDynamicIndexingEXT` + * `UniformTexelBufferArrayNonUniformIndexingEXT` +* `SPV_EXT_fragment_fully_covered` + * `FragmentFullyCoveredEXT` +* `SPV_EXT_fragment_invocation_density` + * `FragmentDensityEXT` +* `SPV_EXT_mesh_shader` + * `MeshShadingEXT` +* `SPV_EXT_physical_storage_buffer` + * `PhysicalStorageBufferAddressesEXT` +* `SPV_EXT_shader_atomic_float_add` + * `AtomicFloat32AddEXT` + * `AtomicFloat64AddEXT` +* `SPV_EXT_shader_atomic_float_min_max` + * `AtomicFloat16MinMaxEXT` + * `AtomicFloat32MinMaxEXT` + * `AtomicFloat64MinMaxEXT` +* `SPV_EXT_shader_atomic_float16_add` + * `AtomicFloat16AddEXT` +* `SPV_EXT_shader_image_int64` + * `Int64ImageEXT` +* `SPV_EXT_shader_stencil_export` + * `StencilExportEXT` +* `SPV_EXT_shader_viewport_index_layer` + * `ShaderViewportIndexLayerEXT` +* `SPV_GOOGLE_decorate_string` +* `SPV_GOOGLE_hlsl_functionality1` +* `SPV_GOOGLE_user_type` + +# Unsupported + +KHR extensions will definitely be implemented at some point, though KHR extensions that entail a large amount of work may be deferred. EXT extensions are likely to be implemented in future but current plans or priorities may vary. Vendor extensions likely won't be supported but could be upon request given how much demand there is and ease of implementation. + +## KHR Extensions + +* `SPIR-V 1.0` + * `Groups` + * `InterpolationFunction` + * `SparseResidency` +* `SPIR-V 1.4` + * `DenormFlushToZero` + * `DenormPreserve` + * `RoundingModeRTE` + * `RoundingModeRTZ` +* `SPIR-V 1.6` + * `DotProduct` + * `DotProductInput4x8Bit` + * `DotProductInput4x8BitPacked` + * `DotProductInputAll` +* `SPV_KHR_bfloat16` + * `BFloat16TypeKHR` + * `BFloat16DotProductKHR` + * `BFloat16CooperativeMatrixKHR` +* `SPV_KHR_compute_shader_derivatives` + * `ComputeDerivativeGroupQuadsKHR` + * `ComputeDerivativeGroupLinearKHR` +* `SPV_KHR_cooperative_matrix` + * `CooperativeMatrixKHR` +* `SPV_KHR_float_controls2` + * `FloatControls2` +* `SPV_KHR_fma` + * `FMAKHR` +* `SPV_KHR_fragment_shader_barycentric` + * `FragmentBarycentricKHR` +* `SPV_KHR_fragment_shading_rate` + * `FragmentShadingRateKHR` +* `SPV_KHR_integer_dot_product` +* `SPV_KHR_untyped_pointers` + * `UntypedPointersKHR` +* `SPV_KHR_variable_pointers` + * `VariablePointers` + * `VariablePointersStorageBuffer` +* `SPV_KHR_workgroup_memory_explicit_layout` + * `WorkgroupMemoryExplicitLayout16BitAccessKHR` + * `WorkgroupMemoryExplicitLayout8BitAccessKHR` + * `WorkgroupMemoryExplicitLayoutKHR` + +## KHR Ray tracing extensions + +* `SPV_KHR_ray_cull_mask` + * `RayCullMaskKHR` +* `SPV_KHR_ray_query` + * `RayQueryKHR` +* `SPV_KHR_ray_tracing_position_fetch` + * `RayTracingPositionFetchKHR` + * `RayQueryPositionFetchKHR` +* `SPV_KHR_ray_tracing` + * `RayTracingKHR` + * `RayTraversalPrimitiveCullingKHR` +* `SPV_EXT_opacity_micromap` + * `RayTracingOpacityMicromapEXT` + +## EXT + +* `SPV_EXT_float8` + * `Float8EXT` + * `Float8CooperativeMatrixEXT` +* `SPV_EXT_fragment_shader_interlock` + * `FragmentShaderSampleInterlockEXT` + * `FragmentShaderShadingRateInterlockEXT` + * `FragmentShaderPixelInterlockEXT` +* `SPV_EXT_replicated_composites` + * `ReplicatedCompositesEXT` +* `SPV_EXT_shader_64bit_indexing` + * `Shader64BitIndexingEXT` +* `SPV_EXT_shader_tile_image` + * `TileImageColorReadAccessEXT` + * `TileImageDepthReadAccessEXT` + * `TileImageStencilReadAccessEXT` + +## Platform/IHV Extensions + +### Altera + +* `SPV_ALTERA_arbitrary_precision_fixed_point` + * `ArbitraryPrecisionFixedPointALTERA` +* `SPV_ALTERA_arbitrary_precision_floating_point` + * `ArbitraryPrecisionFloatingPointALTERA` +* `SPV_ALTERA_arbitrary_precision_integers` + * `ArbitraryPrecisionIntegersALTERA` +* `SPV_ALTERA_blocking_pipes` + * `BlockingPipesALTERA` +* `SPV_ALTERA_fpga_argument_interfaces` + * `FPGAArgumentInterfacesALTERA` +* `SPV_ALTERA_fpga_buffer_location` + * `FPGABufferLocationALTERA` +* `SPV_ALTERA_fpga_cluster_attributes` + * `FPGAClusterAttributesALTERA` + * `FPGAClusterAttributesV2ALTERA` +* `SPV_ALTERA_fpga_dsp_control` + * `FPGADSPControlALTERA` +* `SPV_ALTERA_fpga_invocation_pipelining_attributes` + * `FPGAInvocationPipeliningAttributesALTERA` +* `SPV_ALTERA_fpga_latency_control` + * `FPGALatencyControlALTERA` +* `SPV_ALTERA_fpga_loop_controls` + * `FPGALoopControlsALTERA` +* `SPV_ALTERA_fpga_memory_accesses` + * `FPGAMemoryAccessesALTERA` +* `SPV_ALTERA_fpga_memory_attributes` + * `FPGAMemoryAttributesALTERA` +* `SPV_ALTERA_fpga_reg` + * `FPGARegALTERA` +* `SPV_ALTERA_global_variable_fpga_decorations` + * `GlobalVariableFPGADecorationsALTERA` +* `SPV_ALTERA_io_pipes` + * `IOPipesALTERA` +* `SPV_ALTERA_loop_fuse` + * `LoopFuseALTERA` +* `SPV_ALTERA_runtime_aligned` + * `RuntimeAlignedAttributeALTERA` +* `SPV_ALTERA_task_sequence` + * `TaskSequenceALTERA` +* `SPV_ALTERA_usm_storage_classes` + * `USMStorageClassesALTERA` + +### AMD + +* `SPV_AMD_gcn_shader` +* `SPV_AMD_gpu_shader_half_float_fetch` + * `Float16ImageAMD` +* `SPV_AMD_gpu_shader_half_float` +* `SPV_AMD_gpu_shader_int16` +* `SPV_AMD_shader_ballot` +* `SPV_AMD_shader_early_and_late_fragment_tests` + * `EarlyAndLateFragmentTestsAMD` + * `StencilRefUnchangedFrontAMD` + * `StencilRefGreaterFrontAMD` + * `StencilRefLessFrontAMD` + * `StencilRefUnchangedBackAMD` + * `StencilRefGreaterBackAMD` + * `StencilRefLessBackAMD` +* `SPV_AMD_shader_explicit_vertex_parameter` +* `SPV_AMD_shader_fragment_mask` + * `FragmentMaskAMD` +* `SPV_AMD_shader_image_load_store_lod` + * `ImageReadWriteLodAMD` +* `SPV_AMD_shader_trinary_minmax` +* `SPV_AMD_texture_gather_bias_lod` + * `ImageGatherBiasLodAMD` + +### ARM + +* `SPV_ARM_cooperative_matrix_layouts` + * `CooperativeMatrixLayoutsARM` +* `SPV_ARM_core_builtins` + * `CoreBuiltinsARM` +* `SPV_ARM_graph` + * `GraphARM` +* `SPV_ARM_tensors` + * `TensorsARM` + * `StorageTensorArrayDynamicIndexingARM` + * `StorageTensorArrayNonUniformIndexingARM` + +### Huawei + +* `SPV_HUAWEI_cluster_culling_shader` +* `SPV_HUAWEI_subpass_shading` + +### Intel + +* `SPV_INTEL_2d_block_io` + * `Subgroup2DBlockIOINTEL` + * `Subgroup2DBlockTransformINTEL` + * `Subgroup2DBlockTransposeINTEL` +* `SPV_INTEL_bfloat16_conversion` + * `BFloat16ConversionINTEL` +* `SPV_INTEL_cache_controls` + * `CacheControlsINTEL` +* `SPV_INTEL_device_side_avc_motion_estimation` + * `SubgroupAvcMotionEstimationChromaINTEL` + * `SubgroupAvcMotionEstimationINTEL` + * `SubgroupAvcMotionEstimationIntraINTEL` +* `SPV_INTEL_fp_fast_math_mode` + * `FPFastMathModeINTEL` +* `SPV_INTEL_fp_max_error` + * `FPMaxErrorINTEL` +* `SPV_INTEL_global_variable_host_access` + * `GlobalVariableHostAccessINTEL` +* `SPV_INTEL_int4` + * `Int4TypeINTEL` + * `Int4CooperativeMatrixINTEL` +* `SPV_INTEL_kernel_attributes` + * `FPGAKernelAttributesINTEL` + * `FPGAKernelAttributesv2INTEL` + * `KernelAttributesINTEL` +* `SPV_INTEL_long_composites` + * `LongCompositesINTEL` +* `SPV_INTEL_masked_gather_scatter` + * `MaskedGatherScatterINTEL` +* `SPV_INTEL_maximum_registers` + * `RegisterLimitsINTEL` +* `SPV_INTEL_media_block_io` + * `SubgroupImageMediaBlockIOINTEL` +* `SPV_INTEL_shader_integer_functions2` + * `IntegerFunctions2INTEL` +* `SPV_INTEL_split_barrier` + * `SplitBarrierINTEL` +* `SPV_INTEL_subgroups` + * `SubgroupBufferBlockIOINTEL` + * `SubgroupImageBlockIOINTEL` + * `SubgroupShuffleINTEL` +* `SPV_INTEL_subgroup_buffer_prefetch` + * `SubgroupBufferPrefetchINTEL` +* `SPV_INTEL_subgroup_matrix_multiply_accumulate` + * `SubgroupMatrixMultiplyAccumulateINTEL` +* `SPV_INTEL_tensor_float32_conversion` + * `TensorFloat32RoundingINTEL` +* `SPV_INTEL_ternary_bitwise_function` + * `TernaryBitwiseFunctionINTEL` +* `SPV_INTEL_unstructured_loop_controls` + * `UnstructuredLoopControlsINTEL` +* `SPV_INTEL_variable_length_array` + * `VariableLengthArrayINTEL` + * `UntypedVariableLengthArrayINTEL` + +### NV + +* `SPV_NV_bindless_texture` + * `BindlessTextureNV` +* `SPV_NV_cluster_acceleration_structure` + * `RayTracingClusterAccelerationStructureNV` +* `SPV_NV_compute_shader_derivatives` + * `ComputeDerivativeGroupLinearNV` + * `ComputeDerivativeGroupQuadsNV` +* `SPV_NV_cooperative_matrix` + * `CooperativeMatrixNV` +* `SPV_NV_cooperative_matrix2` + * `CooperativeMatrixReductionsNV` + * `CooperativeMatrixConversionsNV` + * `CooperativeMatrixPerElementOperationsNV` + * `CooperativeMatrixTensorAddressingNV` + * `CooperativeMatrixBlockLoadsNV` +* `SPV_NV_cooperative_vector` + * `CooperativeVectorNV` + * `CooperativeVectorTrainingNV` +* `SPV_NV_displacement_micromap` + * `RayTracingDisplacementMicromapNV` + * `DisplacementMicromapNV` +* `SPV_NV_fragment_shader_barycentric` + * `FragmentBarycentricNV` +* `SPV_NV_geometry_shader_passthrough` + * `GeometryShaderPassthroughNV` +* `SPV_NV_linear_swept_spheres` + * `RayTracingSpheresGeometryNV` + * `RayTracingLinearSweptSpheresGeometryNV` +* `SPV_NV_mesh_shader` + * `MeshShadingNV` +* `SPV_NV_raw_access_chains` + * `RawAccessChainsNV` +* `SPV_NV_ray_tracing_motion_blur` + * `RayTracingMotionBlurNV` +* `SPV_NV_ray_tracing` + * `RayTracingNV` +* `SPV_NV_sample_mask_override_coverage` + * `SampleMaskOverrideCoverageNV` +* `SPV_NV_shader_atomic_fp16_vector` + * `AtomicFloat16VectorNV` +* `SPV_NV_shader_image_footprint` + * `ImageFootprintNV` +* `SPV_NV_shader_invocation_reorder` + * `ShaderInvocationReorderNV` +* `SPV_NV_shader_sm_builtins` + * `ShaderSMBuiltinsNV` +* `SPV_NV_shader_subgroup_partitioned` + * `GroupNonUniformPartitionedNV` +* `SPV_NV_shading_rate` + * `ShadingRateNV` +* `SPV_NV_stereo_view_rendering` + * `ShaderStereoViewNV` +* `SPV_NV_tensor_addressing` + * `TensorAddressingNV` +* `SPV_NV_viewport_array2` + * `ShaderViewportIndexLayerNV` + * `ShaderViewportMaskNV` + +### Qualcomm + +* `SPV_QCOM_cooperative_matrix_conversion` + * `CooperativeMatrixConversionQCOM` +* `SPV_QCOM_image_processing` + * `TextureSampleWeightedQCOM` + * `TextureBoxFilterQCOM` + * `TextureBlockMatchQCOM` +* `SPV_QCOM_image_processing2` + * `TextureBlockMatch2QCOM` +* `SPV_QCOM_tile_shading` + * `TileShadingQCOM` + +### Deprecated / experimental / undocumented / kernel only + +* `SPIR-V 1.0` + * `Addresses` + * `DeviceEnqueue` + * `Float16Buffer` + * `GenericPointer` + * `ImageBasic` + * `ImageMipmap` + * `ImageReadWrite` + * `Kernel` + * `Linkage` + * `LiteralSampler` + * `Pipes` + * `Vector16` +* `SPIR-V 1.1` + * `NamedBarrier` + * `PipeStorage` + * `SubgroupDispatch` +* Provisional ray tracing + * `RayQueryProvisionalKHR` + * `RayTracingProvisionalKHR` +* `SPV_KHR_linkonce_odr` +* `SPV_KHR_uniform_group_instructions` + * `GroupUniformArithmeticKHR` +* `SPV_EXT_arithmetic_fence` + * `ArithmeticFenceEXT` +* `SPV_EXT_image_raw10_raw12` +* `SPV_EXT_optnone` + * `OptNoneEXT` +* `SPV_EXT_relaxed_printf_string_address_space` +* `SPV_AMDX_shader_enqueue` + * `ShaderEnqueueAMDX` +* `SPV_NVX_multiview_per_view_attributes` + * `PerViewAttributesNV` + +#### Dead Capabilities + +For some reason Intel has dumped a load of capabilities/extensions that are undocumented into the registry. Listed here to keep the scripts happy. + + * `DebugInfoModuleINTEL` + * `FunctionPointersINTEL` + * `IndirectReferencesINTEL` + * `AsmINTEL` + * `SpecConditionalINTEL` + * `FunctionVariantsINTEL` + * `AsmINTEL` + * `VectorAnyINTEL` + * `VectorComputeINTEL` + * `RoundToInfinityINTEL` + * `FloatingPointModeINTEL` + * `VariableLengthArrayINTEL` + * `FunctionFloatControlINTEL` + * `MemoryAccessAliasingINTEL` + * `BindlessImagesINTEL` + diff --git a/renderdoc/driver/shaders/spirv/extinst.glsl.std.450.grammar.json b/renderdoc/driver/shaders/spirv/extinst.glsl.std.450.grammar.json index 6fd670392..89338c9d4 100644 --- a/renderdoc/driver/shaders/spirv/extinst.glsl.std.450.grammar.json +++ b/renderdoc/driver/shaders/spirv/extinst.glsl.std.450.grammar.json @@ -1,28 +1,12 @@ { "copyright" : [ "Copyright (c) 2014-2024 The Khronos Group Inc.", - "", - "Permission is hereby granted, free of charge, to any person obtaining a copy", - "of this software and/or associated documentation files (the \"Materials\"),", - "to deal in the Materials without restriction, including without limitation", - "the rights to use, copy, modify, merge, publish, distribute, sublicense,", - "and/or sell copies of the Materials, and to permit persons to whom the", - "Materials are furnished to do so, subject to the following conditions:", - "", - "The above copyright notice and this permission notice shall be included in", - "all copies or substantial portions of the Materials.", + "License: MIT", "", "MODIFICATIONS TO THIS FILE MAY MEAN IT NO LONGER ACCURATELY REFLECTS KHRONOS", "STANDARDS. THE UNMODIFIED, NORMATIVE VERSIONS OF KHRONOS SPECIFICATIONS AND", "HEADER INFORMATION ARE LOCATED AT https://www.khronos.org/registry/ ", - "", - "THE MATERIALS ARE PROVIDED \"AS IS\", WITHOUT WARRANTY OF ANY KIND, EXPRESS", - "OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,", - "FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL", - "THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER", - "LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING", - "FROM,OUT OF OR IN CONNECTION WITH THE MATERIALS OR THE USE OR OTHER DEALINGS", - "IN THE MATERIALS." + "" ], "version" : 100, "revision" : 2, diff --git a/renderdoc/driver/shaders/spirv/extinst.nonsemantic.shader.debuginfo.100.grammar.json b/renderdoc/driver/shaders/spirv/extinst.nonsemantic.shader.debuginfo.100.grammar.json index 7b3928e2e..305f17112 100644 --- a/renderdoc/driver/shaders/spirv/extinst.nonsemantic.shader.debuginfo.100.grammar.json +++ b/renderdoc/driver/shaders/spirv/extinst.nonsemantic.shader.debuginfo.100.grammar.json @@ -1,28 +1,12 @@ { "copyright" : [ - "Copyright (c) 2018-2024 The Khronos Group Inc.", - "", - "Permission is hereby granted, free of charge, to any person obtaining a copy", - "of this software and/or associated documentation files (the \"Materials\"),", - "to deal in the Materials without restriction, including without limitation", - "the rights to use, copy, modify, merge, publish, distribute, sublicense,", - "and/or sell copies of the Materials, and to permit persons to whom the", - "Materials are furnished to do so, subject to the following conditions:", - "", - "The above copyright notice and this permission notice shall be included in", - "all copies or substantial portions of the Materials.", + "Copyright: 2018-2024 The Khronos Group Inc.", + "License: MIT", "", "MODIFICATIONS TO THIS FILE MAY MEAN IT NO LONGER ACCURATELY REFLECTS KHRONOS", "STANDARDS. THE UNMODIFIED, NORMATIVE VERSIONS OF KHRONOS SPECIFICATIONS AND", "HEADER INFORMATION ARE LOCATED AT https://www.khronos.org/registry/ ", - "", - "THE MATERIALS ARE PROVIDED \"AS IS\", WITHOUT WARRANTY OF ANY KIND, EXPRESS", - "OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,", - "FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL", - "THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER", - "LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING", - "FROM,OUT OF OR IN CONNECTION WITH THE MATERIALS OR THE USE OR OTHER DEALINGS", - "IN THE MATERIALS." + "" ], "version" : 100, "revision" : 6, @@ -563,35 +547,35 @@ "enumerants" : [ { "enumerant" : "Unspecified", - "value" : "0" + "value" : 0 }, { "enumerant" : "Address", - "value" : "1" + "value" : 1 }, { "enumerant" : "Boolean", - "value" : "2" + "value" : 2 }, { "enumerant" : "Float", - "value" : "3" + "value" : 3 }, { "enumerant" : "Signed", - "value" : "4" + "value" : 4 }, { "enumerant" : "SignedChar", - "value" : "5" + "value" : 5 }, { "enumerant" : "Unsigned", - "value" : "6" + "value" : 6 }, { "enumerant" : "UnsignedChar", - "value" : "7" + "value" : 7 } ] }, @@ -601,15 +585,15 @@ "enumerants" : [ { "enumerant" : "Class", - "value" : "0" + "value" : 0 }, { "enumerant" : "Structure", - "value" : "1" + "value" : 1 }, { "enumerant" : "Union", - "value" : "2" + "value" : 2 } ] }, @@ -619,19 +603,19 @@ "enumerants" : [ { "enumerant" : "ConstType", - "value" : "0" + "value" : 0 }, { "enumerant" : "VolatileType", - "value" : "1" + "value" : 1 }, { "enumerant" : "RestrictType", - "value" : "2" + "value" : 2 }, { "enumerant" : "AtomicType", - "value" : "3" + "value" : 3 } ] }, @@ -641,26 +625,26 @@ "enumerants" : [ { "enumerant" : "Deref", - "value" : "0" + "value" : 0 }, { "enumerant" : "Plus", - "value" : "1" + "value" : 1 }, { "enumerant" : "Minus", - "value" : "2" + "value" : 2 }, { "enumerant" : "PlusUconst", - "value" : "3", + "value" : 3, "parameters" : [ { "kind" : "IdRef" } ] }, { "enumerant" : "BitPiece", - "value" : "4", + "value" : 4, "parameters" : [ { "kind" : "IdRef" }, { "kind" : "IdRef" } @@ -668,26 +652,26 @@ }, { "enumerant" : "Swap", - "value" : "5" + "value" : 5 }, { "enumerant" : "Xderef", - "value" : "6" + "value" : 6 }, { "enumerant" : "StackValue", - "value" : "7" + "value" : 7 }, { "enumerant" : "Constu", - "value" : "8", + "value" : 8, "parameters" : [ { "kind" : "IdRef" } ] }, { "enumerant" : "Fragment", - "value" : "9", + "value" : 9, "parameters" : [ { "kind" : "IdRef" }, { "kind" : "IdRef" } @@ -701,11 +685,11 @@ "enumerants" : [ { "enumerant" : "ImportedModule", - "value" : "0" + "value" : 0 }, { "enumerant" : "ImportedDeclaration", - "value" : "1" + "value" : 1 } ] } diff --git a/renderdoc/driver/shaders/spirv/gen_spirv_code.py b/renderdoc/driver/shaders/spirv/gen_spirv_code.py index 47166761b..43017e1f0 100644 --- a/renderdoc/driver/shaders/spirv/gen_spirv_code.py +++ b/renderdoc/driver/shaders/spirv/gen_spirv_code.py @@ -57,6 +57,8 @@ def operand_name(name, lowercase_first = True): return 'arguments' if re.search(r'variable, parent.*\.\.\.', name, re.RegexFlag.I): return 'parents' + if re.search(r'condition 0, operand.*\.\.\.', name, re.RegexFlag.I): + return 'conditional_arguments' name = re.sub(r'<<(.*),(.*)>>', r'\2', name) name = re.sub(r'[ \'~<>./-]', '', name) @@ -212,6 +214,16 @@ inline uint32_t DecodeParam(const ConstIter &it, uint32_t &word) return ret; }} +template<> +inline Capability DecodeParam(const ConstIter &it, uint32_t &word) +{{ + if(word >= it.size()) return Capability::Invalid; + + Capability ret = Capability(word); + word += 1; + return ret; +}} + template<> inline Id DecodeParam(const ConstIter &it, uint32_t &word) {{ diff --git a/renderdoc/driver/shaders/spirv/spir-v.xml b/renderdoc/driver/shaders/spirv/spir-v.xml index 4d2861ad8..ba45e3d08 100644 --- a/renderdoc/driver/shaders/spirv/spir-v.xml +++ b/renderdoc/driver/shaders/spirv/spir-v.xml @@ -1,26 +1,8 @@ diff --git a/renderdoc/driver/shaders/spirv/spirv.core.grammar.json b/renderdoc/driver/shaders/spirv/spirv.core.grammar.json index 3a4744d6b..74aff15f7 100644 --- a/renderdoc/driver/shaders/spirv/spirv.core.grammar.json +++ b/renderdoc/driver/shaders/spirv/spirv.core.grammar.json @@ -1,28 +1,12 @@ { "copyright" : [ - "Copyright (c) 2014-2024 The Khronos Group Inc.", + "Copyright: 2014-2024 The Khronos Group Inc.", + "License: MIT", "", - "Permission is hereby granted, free of charge, to any person obtaining a copy", - "of this software and/or associated documentation files (the \"Materials\"),", - "to deal in the Materials without restriction, including without limitation", - "the rights to use, copy, modify, merge, publish, distribute, sublicense,", - "and/or sell copies of the Materials, and to permit persons to whom the", - "Materials are furnished to do so, subject to the following conditions:", - "", - "The above copyright notice and this permission notice shall be included in", - "all copies or substantial portions of the Materials.", - "", - "MODIFICATIONS TO THIS FILE MAY MEAN IT NO LONGER ACCURATELY REFLECTS KHRONOS", - "STANDARDS. THE UNMODIFIED, NORMATIVE VERSIONS OF KHRONOS SPECIFICATIONS AND", - "HEADER INFORMATION ARE LOCATED AT https://www.khronos.org/registry/ ", - "", - "THE MATERIALS ARE PROVIDED \"AS IS\", WITHOUT WARRANTY OF ANY KIND, EXPRESS", - "OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,", - "FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL", - "THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER", - "LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING", - "FROM,OUT OF OR IN CONNECTION WITH THE MATERIALS OR THE USE OR OTHER DEALINGS", - "IN THE MATERIALS." + "MODIFICATIONS TO THIS FILE MAY MEAN IT NO LONGER ACCURATELY REFLECTS", + "KHRONOS STANDARDS. THE UNMODIFIED, NORMATIVE VERSIONS OF KHRONOS", + "SPECIFICATIONS AND HEADER INFORMATION ARE LOCATED AT", + "https://www.khronos.org/registry/" ], "magic_number" : "0x07230203", "major_version" : 1, @@ -132,6 +116,10 @@ "tag" : "Tensor", "heading" : "Tensor Instructions" }, + { + "tag" : "Graph", + "heading" : "Graph Instructions" + }, { "tag" : "Reserved", "heading" : "Reserved Instructions" @@ -1371,6 +1359,7 @@ { "kind" : "IdResult" }, { "kind" : "IdRef", "name" : "Value" } ], + "capabilities" : [ "Shader" ], "version": "1.0" }, { @@ -3930,7 +3919,7 @@ { "kind" : "IdResult" }, { "kind" : "IdScope", "name" : "Execution" }, { "kind" : "IdRef", "name" : "Value" }, - { "kind" : "IdRef", "name" : "Id" } + { "kind" : "IdRef", "name" : "Invocation Id" } ], "capabilities" : [ "GroupNonUniformBallot" ], "version" : "1.3" @@ -4037,7 +4026,7 @@ { "kind" : "IdResult" }, { "kind" : "IdScope", "name" : "Execution" }, { "kind" : "IdRef", "name" : "Value" }, - { "kind" : "IdRef", "name" : "Id" } + { "kind" : "IdRef", "name" : "Invocation Id" } ], "capabilities" : [ "GroupNonUniformShuffle" ], "version" : "1.3" @@ -4490,6 +4479,85 @@ "capabilities" : [ "TensorsARM" ], "version" : "None" }, + { + "opname" : "OpGraphConstantARM", + "class" : "Graph", + "opcode" : 4181, + "operands" : [ + { "kind" : "IdResultType" }, + { "kind" : "IdResult" }, + { "kind" : "LiteralInteger", "name" : "GraphConstantID" } + ], + "capabilities" : [ "GraphARM" ], + "version" : "None" + }, + { + "opname" : "OpGraphEntryPointARM", + "class" : "Graph", + "opcode" : 4182, + "operands" : [ + { "kind" : "IdRef", "name" : "Graph" }, + { "kind" : "LiteralString", "name" : "Name" }, + { "kind" : "IdRef", "quantifier" : "*", "name" : "Interface" } + ], + "capabilities" : [ "GraphARM" ], + "version" : "None" + }, + { + "opname" : "OpGraphARM", + "class" : "Graph", + "opcode" : 4183, + "operands" : [ + { "kind" : "IdResultType" }, + { "kind" : "IdResult" } + ], + "capabilities" : [ "GraphARM" ], + "version" : "None" + }, + { + "opname" : "OpGraphInputARM", + "class" : "Graph", + "opcode" : 4184, + "operands" : [ + { "kind" : "IdResultType" }, + { "kind" : "IdResult" }, + { "kind" : "IdRef", "name" : "InputIndex" }, + { "kind" : "IdRef", "quantifier" : "*", "name" : "ElementIndex" } + ], + "capabilities" : [ "GraphARM" ], + "version" : "None" + }, + { + "opname" : "OpGraphSetOutputARM", + "class" : "Graph", + "opcode" : 4185, + "operands" : [ + { "kind" : "IdRef", "name": "Value" }, + { "kind" : "IdRef", "name" : "OutputIndex" }, + { "kind" : "IdRef", "quantifier" : "*", "name" : "ElementIndex" } + ], + "capabilities" : [ "GraphARM" ], + "version" : "None" + }, + { + "opname" : "OpGraphEndARM", + "class" : "Graph", + "opcode" : 4186, + "capabilities" : [ "GraphARM" ], + "version" : "None" + }, + { + "opname" : "OpTypeGraphARM", + "class" : "Type-Declaration", + "opcode" : 4190, + "operands" : [ + { "kind" : "IdResult" }, + { "kind" : "LiteralInteger", "name" : "NumInputs" }, + { "kind" : "IdRef", "quantifier" : "*", "name" : "InOutTypes" } + ], + "capabilities" : [ "GraphARM" ], + "version" : "None" + }, { "opname" : "OpTerminateInvocation", "class" : "Control-Flow", @@ -4507,7 +4575,6 @@ "capabilities" : [ "UntypedPointersKHR" ], - "provisional" : true, "version" : "None", "operands" : [ { "kind" : "IdResult" }, @@ -4519,7 +4586,6 @@ "class" : "Memory", "opcode" : 4418, "capabilities" : [ "UntypedPointersKHR" ], - "provisional" : true, "version" : "None", "operands" : [ { "kind" : "IdResultType" }, @@ -4534,7 +4600,6 @@ "class" : "Memory", "opcode" : 4419, "capabilities" : [ "UntypedPointersKHR" ], - "provisional" : true, "version" : "None", "operands" : [ { "kind" : "IdResultType" }, @@ -4549,7 +4614,6 @@ "class" : "Memory", "opcode" : 4420, "capabilities" : [ "UntypedPointersKHR" ], - "provisional" : true, "version" : "None", "operands" : [ { "kind" : "IdResultType" }, @@ -4590,7 +4654,6 @@ "class" : "Memory", "opcode" : 4423, "capabilities" : [ "UntypedPointersKHR" ], - "provisional" : true, "version" : "None", "operands" : [ { "kind" : "IdResultType" }, @@ -4606,7 +4669,6 @@ "class" : "Memory", "opcode" : 4424, "capabilities" : [ "UntypedPointersKHR" ], - "provisional" : true, "version" : "None", "operands" : [ { "kind" : "IdResultType" }, @@ -4622,7 +4684,6 @@ "class" : "Memory", "opcode" : 4425, "capabilities" : [ "UntypedPointersKHR" ], - "provisional" : true, "version" : "None", "operands" : [ { "kind" : "IdResultType" }, @@ -4637,7 +4698,6 @@ "class" : "Memory", "opcode" : 4426, "capabilities" : [ "UntypedPointersKHR" ], - "provisional" : true, "version" : "None", "operands" : [ { "kind" : "IdRef", "name" : "Pointer Type" }, @@ -4647,6 +4707,20 @@ { "kind" : "IdRef", "quantifier" : "?", "name" : "Cache Type" } ] }, + { + "opname" : "OpFmaKHR", + "class" : "Arithmetic", + "opcode" : 4427, + "operands" : [ + { "kind" : "IdResultType" }, + { "kind" : "IdResult" }, + { "kind" : "IdRef", "name" : "Operand 1" }, + { "kind" : "IdRef", "name" : "Operand 2" }, + { "kind" : "IdRef", "name" : "Operand 3" } + ], + "capabilities" : [ "FMAKHR" ], + "version" : "None" + }, { "opname" : "OpSubgroupAllKHR", "class" : "Group", @@ -4735,6 +4809,26 @@ "extensions" : [ "SPV_KHR_relaxed_extended_instruction" ], "version": "None" }, + { + "opname" : "OpUntypedGroupAsyncCopyKHR", + "class" : "Group", + "opcode" : 4434, + "capabilities" : [ "UntypedPointersKHR" ], + "version" : "None", + "operands" : [ + { "kind" : "IdResultType" }, + { "kind" : "IdResult" }, + { "kind" : "IdRef", "name" : "Execution" }, + { "kind" : "IdRef", "name" : "Destination" }, + { "kind" : "IdRef", "name" : "Source" }, + { "kind" : "IdRef", "name" : "Element Num Bytes" }, + { "kind" : "IdRef", "name" : "Num Elements" }, + { "kind" : "IdRef", "name" : "Stride" }, + { "kind" : "IdRef", "name" : "Event" }, + { "kind" : "MemoryAccess", "quantifier" : "?", "name" : "Destination Memory Operands" }, + { "kind" : "MemoryAccess", "quantifier" : "?", "name" : "Source Memory Operands" } + ] + }, { "opname" : "OpTraceRayKHR", "class" : "Reserved", @@ -5201,6 +5295,18 @@ "capabilities" : [ "TextureBlockMatchQCOM" ], "version" : "None" }, + { + "opname" : "OpBitCastArrayQCOM", + "class" : "Conversion", + "opcode" : 4497, + "operands" : [ + { "kind" : "IdResultType" }, + { "kind" : "IdResult" }, + { "kind" : "IdRef", "name" : "Source Array" } + ], + "capabilities" : [ "CooperativeMatrixConversionQCOM" ], + "version" : "None" + }, { "opname" : "OpImageBlockMatchWindowSSDQCOM", "class" : "Image", @@ -5265,6 +5371,43 @@ "capabilities" : [ "TextureBlockMatch2QCOM" ], "version" : "None" }, + { + "opname" : "OpCompositeConstructCoopMatQCOM", + "class" : "Composite", + "opcode" : 4540, + "operands" : [ + { "kind" : "IdResultType" }, + { "kind" : "IdResult" }, + { "kind" : "IdRef", "name" : "Source Array" } + ], + "capabilities" : [ "CooperativeMatrixConversionQCOM" ], + "version" : "None" + }, + { + "opname" : "OpCompositeExtractCoopMatQCOM", + "class" : "Composite", + "opcode" : 4541, + "operands" : [ + { "kind" : "IdResultType" }, + { "kind" : "IdResult" }, + { "kind" : "IdRef", "name" : "Source Cooperative Matrix" } + ], + "capabilities" : [ "CooperativeMatrixConversionQCOM" ], + "version" : "None" + }, + { + "opname" : "OpExtractSubArrayQCOM", + "class" : "Composite", + "opcode" : 4542, + "operands" : [ + { "kind" : "IdResultType" }, + { "kind" : "IdResult" }, + { "kind" : "IdRef", "name" : "Source Array" }, + { "kind" : "IdRef", "name" : "index" } + ], + "capabilities" : [ "CooperativeMatrixConversionQCOM" ], + "version" : "None" + }, { "opname" : "OpGroupIAddNonUniformAMD", "class" : "Group", @@ -6375,8 +6518,9 @@ "version" : "None" }, { - "opname" : "OpRayQueryGetClusterIdNV", + "opname" : "OpRayQueryGetIntersectionClusterIdNV", "class" : "Reserved", + "aliases" : ["OpRayQueryGetClusterIdNV"], "opcode" : 5345, "operands" : [ { "kind" : "IdResultType" }, @@ -8109,7 +8253,7 @@ { "kind" : "IdResult" }, { "kind" : "IdRef", "name" : "Fwd Ref Offset" }, { "kind" : "IdRef", "name" : "Bwd Ref Offset" }, - { "kind" : "IdRef", "name" : "id> Search Window Config" }, + { "kind" : "IdRef", "name" : "Search Window Config" }, { "kind" : "IdRef", "name" : "Payload" } ], "capabilities" : [ "SubgroupAvcMotionEstimationINTEL" ], @@ -9026,19 +9170,19 @@ }, { "opname" : "OpVariableLengthArrayINTEL", - "class" : "@exclude", + "class" : "Memory", "opcode" : 5818, "operands" : [ { "kind" : "IdResultType" }, { "kind" : "IdResult" }, - { "kind" : "IdRef", "name" : "Lenght" } + { "kind" : "IdRef", "name" : "Length" } ], "capabilities" : [ "VariableLengthArrayINTEL" ], "version" : "None" }, { "opname" : "OpSaveMemoryINTEL", - "class" : "@exclude", + "class" : "Memory", "opcode" : 5819, "operands" : [ { "kind" : "IdResultType" }, @@ -9049,7 +9193,7 @@ }, { "opname" : "OpRestoreMemoryINTEL", - "class" : "@exclude", + "class" : "Memory", "opcode" : 5820, "operands" : [ { "kind" : "IdRef", "name" : "Ptr" } @@ -9058,8 +9202,9 @@ "version" : "None" }, { - "opname" : "OpArbitraryFloatSinCosPiINTEL", + "opname" : "OpArbitraryFloatSinCosPiALTERA", "class" : "@exclude", + "aliases" : [ "OpArbitraryFloatSinCosPiINTEL" ], "opcode" : 5840, "operands" : [ { "kind" : "IdResultType" }, @@ -9071,12 +9216,13 @@ { "kind" : "LiteralInteger", "name" : "Rounding" }, { "kind" : "LiteralInteger", "name" : "RoundingAccuracy" } ], - "capabilities" : [ "ArbitraryPrecisionFloatingPointINTEL" ], + "capabilities" : [ "ArbitraryPrecisionFloatingPointALTERA" ], "version" : "None" }, { - "opname" : "OpArbitraryFloatCastINTEL", + "opname" : "OpArbitraryFloatCastALTERA", "class" : "@exclude", + "aliases" : [ "OpArbitraryFloatCastINTEL" ], "opcode" : 5841, "operands" : [ { "kind" : "IdResultType" }, @@ -9088,12 +9234,13 @@ { "kind" : "LiteralInteger", "name" : "Rounding" }, { "kind" : "LiteralInteger", "name" : "Accuracy" } ], - "capabilities" : [ "ArbitraryPrecisionFloatingPointINTEL" ], + "capabilities" : [ "ArbitraryPrecisionFloatingPointALTERA" ], "version" : "None" }, { - "opname" : "OpArbitraryFloatCastFromIntINTEL", + "opname" : "OpArbitraryFloatCastFromIntALTERA", "class" : "@exclude", + "aliases" : [ "OpArbitraryFloatCastFromIntINTEL" ], "opcode" : 5842, "operands" : [ { "kind" : "IdResultType" }, @@ -9105,12 +9252,13 @@ { "kind" : "LiteralInteger", "name" : "Rounding" }, { "kind" : "LiteralInteger", "name" : "Accuracy" } ], - "capabilities" : [ "ArbitraryPrecisionFloatingPointINTEL" ], + "capabilities" : [ "ArbitraryPrecisionFloatingPointALTERA" ], "version" : "None" }, { - "opname" : "OpArbitraryFloatCastToIntINTEL", + "opname" : "OpArbitraryFloatCastToIntALTERA", "class" : "@exclude", + "aliases" : [ "OpArbitraryFloatCastToIntINTEL" ], "opcode" : 5843, "operands" : [ { "kind" : "IdResultType" }, @@ -9122,12 +9270,13 @@ { "kind" : "LiteralInteger", "name" : "Rounding" }, { "kind" : "LiteralInteger", "name" : "Accuracy" } ], - "capabilities" : [ "ArbitraryPrecisionFloatingPointINTEL" ], + "capabilities" : [ "ArbitraryPrecisionFloatingPointALTERA" ], "version" : "None" }, { - "opname" : "OpArbitraryFloatAddINTEL", + "opname" : "OpArbitraryFloatAddALTERA", "class" : "@exclude", + "aliases" : [ "OpArbitraryFloatAddINTEL" ], "opcode" : 5846, "operands" : [ { "kind" : "IdResultType" }, @@ -9141,12 +9290,13 @@ { "kind" : "LiteralInteger", "name" : "Rounding" }, { "kind" : "LiteralInteger", "name" : "Accuracy" } ], - "capabilities" : [ "ArbitraryPrecisionFloatingPointINTEL" ], + "capabilities" : [ "ArbitraryPrecisionFloatingPointALTERA" ], "version" : "None" }, { - "opname" : "OpArbitraryFloatSubINTEL", + "opname" : "OpArbitraryFloatSubALTERA", "class" : "@exclude", + "aliases" : [ "OpArbitraryFloatSubINTEL" ], "opcode" : 5847, "operands" : [ { "kind" : "IdResultType" }, @@ -9160,12 +9310,13 @@ { "kind" : "LiteralInteger", "name" : "Rounding" }, { "kind" : "LiteralInteger", "name" : "Accuracy" } ], - "capabilities" : [ "ArbitraryPrecisionFloatingPointINTEL" ], + "capabilities" : [ "ArbitraryPrecisionFloatingPointALTERA" ], "version" : "None" }, { - "opname" : "OpArbitraryFloatMulINTEL", + "opname" : "OpArbitraryFloatMulALTERA", "class" : "@exclude", + "aliases" : [ "OpArbitraryFloatMulINTEL" ], "opcode" : 5848, "operands" : [ { "kind" : "IdResultType" }, @@ -9179,12 +9330,13 @@ { "kind" : "LiteralInteger", "name" : "Rounding" }, { "kind" : "LiteralInteger", "name" : "Accuracy" } ], - "capabilities" : [ "ArbitraryPrecisionFloatingPointINTEL" ], + "capabilities" : [ "ArbitraryPrecisionFloatingPointALTERA" ], "version" : "None" }, { - "opname" : "OpArbitraryFloatDivINTEL", + "opname" : "OpArbitraryFloatDivALTERA", "class" : "@exclude", + "aliases" : [ "OpArbitraryFloatDivINTEL" ], "opcode" : 5849, "operands" : [ { "kind" : "IdResultType" }, @@ -9198,12 +9350,13 @@ { "kind" : "LiteralInteger", "name" : "Rounding" }, { "kind" : "LiteralInteger", "name" : "Accuracy" } ], - "capabilities" : [ "ArbitraryPrecisionFloatingPointINTEL" ], + "capabilities" : [ "ArbitraryPrecisionFloatingPointALTERA" ], "version" : "None" }, { - "opname" : "OpArbitraryFloatGTINTEL", + "opname" : "OpArbitraryFloatGTALTERA", "class" : "@exclude", + "aliases" : [ "OpArbitraryFloatGTINTEL" ], "opcode" : 5850, "operands" : [ { "kind" : "IdResultType" }, @@ -9213,12 +9366,13 @@ { "kind" : "IdRef", "name" : "B" }, { "kind" : "LiteralInteger", "name" : "Mb" } ], - "capabilities" : [ "ArbitraryPrecisionFloatingPointINTEL" ], + "capabilities" : [ "ArbitraryPrecisionFloatingPointALTERA" ], "version" : "None" }, { - "opname" : "OpArbitraryFloatGEINTEL", + "opname" : "OpArbitraryFloatGEALTERA", "class" : "@exclude", + "aliases" : [ "OpArbitraryFloatGEINTEL" ], "opcode" : 5851, "operands" : [ { "kind" : "IdResultType" }, @@ -9228,12 +9382,13 @@ { "kind" : "IdRef", "name" : "B" }, { "kind" : "LiteralInteger", "name" : "Mb" } ], - "capabilities" : [ "ArbitraryPrecisionFloatingPointINTEL" ], + "capabilities" : [ "ArbitraryPrecisionFloatingPointALTERA" ], "version" : "None" }, { - "opname" : "OpArbitraryFloatLTINTEL", + "opname" : "OpArbitraryFloatLTALTERA", "class" : "@exclude", + "aliases" : [ "OpArbitraryFloatLTINTEL" ], "opcode" : 5852, "operands" : [ { "kind" : "IdResultType" }, @@ -9243,12 +9398,13 @@ { "kind" : "IdRef", "name" : "B" }, { "kind" : "LiteralInteger", "name" : "Mb" } ], - "capabilities" : [ "ArbitraryPrecisionFloatingPointINTEL" ], + "capabilities" : [ "ArbitraryPrecisionFloatingPointALTERA" ], "version" : "None" }, { - "opname" : "OpArbitraryFloatLEINTEL", + "opname" : "OpArbitraryFloatLEALTERA", "class" : "@exclude", + "aliases" : [ "OpArbitraryFloatLEINTEL" ], "opcode" : 5853, "operands" : [ { "kind" : "IdResultType" }, @@ -9258,12 +9414,13 @@ { "kind" : "IdRef", "name" : "B" }, { "kind" : "LiteralInteger", "name" : "Mb" } ], - "capabilities" : [ "ArbitraryPrecisionFloatingPointINTEL" ], + "capabilities" : [ "ArbitraryPrecisionFloatingPointALTERA" ], "version" : "None" }, { - "opname" : "OpArbitraryFloatEQINTEL", + "opname" : "OpArbitraryFloatEQALTERA", "class" : "@exclude", + "aliases" : [ "OpArbitraryFloatEQINTEL" ], "opcode" : 5854, "operands" : [ { "kind" : "IdResultType" }, @@ -9273,12 +9430,13 @@ { "kind" : "IdRef", "name" : "B" }, { "kind" : "LiteralInteger", "name" : "Mb" } ], - "capabilities" : [ "ArbitraryPrecisionFloatingPointINTEL" ], + "capabilities" : [ "ArbitraryPrecisionFloatingPointALTERA" ], "version" : "None" }, { - "opname" : "OpArbitraryFloatRecipINTEL", + "opname" : "OpArbitraryFloatRecipALTERA", "class" : "@exclude", + "aliases" : [ "OpArbitraryFloatRecipINTEL" ], "opcode" : 5855, "operands" : [ { "kind" : "IdResultType" }, @@ -9290,12 +9448,13 @@ { "kind" : "LiteralInteger", "name" : "Rounding" }, { "kind" : "LiteralInteger", "name" : "Accuracy" } ], - "capabilities" : [ "ArbitraryPrecisionFloatingPointINTEL" ], + "capabilities" : [ "ArbitraryPrecisionFloatingPointALTERA" ], "version" : "None" }, { - "opname" : "OpArbitraryFloatRSqrtINTEL", + "opname" : "OpArbitraryFloatRSqrtALTERA", "class" : "@exclude", + "aliases" : [ "OpArbitraryFloatRSqrtINTEL" ], "opcode" : 5856, "operands" : [ { "kind" : "IdResultType" }, @@ -9307,12 +9466,13 @@ { "kind" : "LiteralInteger", "name" : "Rounding" }, { "kind" : "LiteralInteger", "name" : "Accuracy" } ], - "capabilities" : [ "ArbitraryPrecisionFloatingPointINTEL" ], + "capabilities" : [ "ArbitraryPrecisionFloatingPointALTERA" ], "version" : "None" }, { - "opname" : "OpArbitraryFloatCbrtINTEL", + "opname" : "OpArbitraryFloatCbrtALTERA", "class" : "@exclude", + "aliases" : [ "OpArbitraryFloatCbrtINTEL" ], "opcode" : 5857, "operands" : [ { "kind" : "IdResultType" }, @@ -9324,12 +9484,13 @@ { "kind" : "LiteralInteger", "name" : "Rounding" }, { "kind" : "LiteralInteger", "name" : "Accuracy" } ], - "capabilities" : [ "ArbitraryPrecisionFloatingPointINTEL" ], + "capabilities" : [ "ArbitraryPrecisionFloatingPointALTERA" ], "version" : "None" }, { - "opname" : "OpArbitraryFloatHypotINTEL", + "opname" : "OpArbitraryFloatHypotALTERA", "class" : "@exclude", + "aliases" : [ "OpArbitraryFloatHypotINTEL" ], "opcode" : 5858, "operands" : [ { "kind" : "IdResultType" }, @@ -9343,12 +9504,13 @@ { "kind" : "LiteralInteger", "name" : "Rounding" }, { "kind" : "LiteralInteger", "name" : "Accuracy" } ], - "capabilities" : [ "ArbitraryPrecisionFloatingPointINTEL" ], + "capabilities" : [ "ArbitraryPrecisionFloatingPointALTERA" ], "version" : "None" }, { - "opname" : "OpArbitraryFloatSqrtINTEL", + "opname" : "OpArbitraryFloatSqrtALTERA", "class" : "@exclude", + "aliases" : [ "OpArbitraryFloatSqrtINTEL" ], "opcode" : 5859, "operands" : [ { "kind" : "IdResultType" }, @@ -9360,7 +9522,7 @@ { "kind" : "LiteralInteger", "name" : "Rounding" }, { "kind" : "LiteralInteger", "name" : "Accuracy" } ], - "capabilities" : [ "ArbitraryPrecisionFloatingPointINTEL" ], + "capabilities" : [ "ArbitraryPrecisionFloatingPointALTERA" ], "version" : "None" }, { @@ -9377,7 +9539,7 @@ { "kind" : "LiteralInteger", "name" : "Rounding" }, { "kind" : "LiteralInteger", "name" : "Accuracy" } ], - "capabilities" : [ "ArbitraryPrecisionFloatingPointINTEL" ], + "capabilities" : [ "ArbitraryPrecisionFloatingPointALTERA" ], "version" : "None" }, { @@ -9394,7 +9556,7 @@ { "kind" : "LiteralInteger", "name" : "Rounding" }, { "kind" : "LiteralInteger", "name" : "Accuracy" } ], - "capabilities" : [ "ArbitraryPrecisionFloatingPointINTEL" ], + "capabilities" : [ "ArbitraryPrecisionFloatingPointALTERA" ], "version" : "None" }, { @@ -9411,7 +9573,7 @@ { "kind" : "LiteralInteger", "name" : "Rounding" }, { "kind" : "LiteralInteger", "name" : "Accuracy" } ], - "capabilities" : [ "ArbitraryPrecisionFloatingPointINTEL" ], + "capabilities" : [ "ArbitraryPrecisionFloatingPointALTERA" ], "version" : "None" }, { @@ -9428,7 +9590,7 @@ { "kind" : "LiteralInteger", "name" : "Rounding" }, { "kind" : "LiteralInteger", "name" : "Accuracy" } ], - "capabilities" : [ "ArbitraryPrecisionFloatingPointINTEL" ], + "capabilities" : [ "ArbitraryPrecisionFloatingPointALTERA" ], "version" : "None" }, { @@ -9445,7 +9607,7 @@ { "kind" : "LiteralInteger", "name" : "Rounding" }, { "kind" : "LiteralInteger", "name" : "Accuracy" } ], - "capabilities" : [ "ArbitraryPrecisionFloatingPointINTEL" ], + "capabilities" : [ "ArbitraryPrecisionFloatingPointALTERA" ], "version" : "None" }, { @@ -9462,7 +9624,7 @@ { "kind" : "LiteralInteger", "name" : "Rounding" }, { "kind" : "LiteralInteger", "name" : "Accuracy" } ], - "capabilities" : [ "ArbitraryPrecisionFloatingPointINTEL" ], + "capabilities" : [ "ArbitraryPrecisionFloatingPointALTERA" ], "version" : "None" }, { @@ -9479,7 +9641,7 @@ { "kind" : "LiteralInteger", "name" : "Rounding" }, { "kind" : "LiteralInteger", "name" : "Accuracy" } ], - "capabilities" : [ "ArbitraryPrecisionFloatingPointINTEL" ], + "capabilities" : [ "ArbitraryPrecisionFloatingPointALTERA" ], "version" : "None" }, { @@ -9496,7 +9658,7 @@ { "kind" : "LiteralInteger", "name" : "Rounding" }, { "kind" : "LiteralInteger", "name" : "Accuracy" } ], - "capabilities" : [ "ArbitraryPrecisionFloatingPointINTEL" ], + "capabilities" : [ "ArbitraryPrecisionFloatingPointALTERA" ], "version" : "None" }, { @@ -9513,7 +9675,7 @@ { "kind" : "LiteralInteger", "name" : "Rounding" }, { "kind" : "LiteralInteger", "name" : "Accuracy" } ], - "capabilities" : [ "ArbitraryPrecisionFloatingPointINTEL" ], + "capabilities" : [ "ArbitraryPrecisionFloatingPointALTERA" ], "version" : "None" }, { @@ -9530,7 +9692,7 @@ { "kind" : "LiteralInteger", "name" : "Rounding" }, { "kind" : "LiteralInteger", "name" : "Accuracy" } ], - "capabilities" : [ "ArbitraryPrecisionFloatingPointINTEL" ], + "capabilities" : [ "ArbitraryPrecisionFloatingPointALTERA" ], "version" : "None" }, { @@ -9547,7 +9709,7 @@ { "kind" : "LiteralInteger", "name" : "Rounding" }, { "kind" : "LiteralInteger", "name" : "Accuracy" } ], - "capabilities" : [ "ArbitraryPrecisionFloatingPointINTEL" ], + "capabilities" : [ "ArbitraryPrecisionFloatingPointALTERA" ], "version" : "None" }, { @@ -9564,7 +9726,7 @@ { "kind" : "LiteralInteger", "name" : "Rounding" }, { "kind" : "LiteralInteger", "name" : "Accuracy" } ], - "capabilities" : [ "ArbitraryPrecisionFloatingPointINTEL" ], + "capabilities" : [ "ArbitraryPrecisionFloatingPointALTERA" ], "version" : "None" }, { @@ -9581,7 +9743,7 @@ { "kind" : "LiteralInteger", "name" : "Rounding" }, { "kind" : "LiteralInteger", "name" : "Accuracy" } ], - "capabilities" : [ "ArbitraryPrecisionFloatingPointINTEL" ], + "capabilities" : [ "ArbitraryPrecisionFloatingPointALTERA" ], "version" : "None" }, { @@ -9598,7 +9760,7 @@ { "kind" : "LiteralInteger", "name" : "Rounding" }, { "kind" : "LiteralInteger", "name" : "Accuracy" } ], - "capabilities" : [ "ArbitraryPrecisionFloatingPointINTEL" ], + "capabilities" : [ "ArbitraryPrecisionFloatingPointALTERA" ], "version" : "None" }, { @@ -9615,7 +9777,7 @@ { "kind" : "LiteralInteger", "name" : "Rounding" }, { "kind" : "LiteralInteger", "name" : "Accuracy" } ], - "capabilities" : [ "ArbitraryPrecisionFloatingPointINTEL" ], + "capabilities" : [ "ArbitraryPrecisionFloatingPointALTERA" ], "version" : "None" }, { @@ -9632,7 +9794,7 @@ { "kind" : "LiteralInteger", "name" : "RoundingMode" }, { "kind" : "LiteralInteger", "name" : "RoundingAccuracy" } ], - "capabilities" : [ "ArbitraryPrecisionFloatingPointINTEL" ], + "capabilities" : [ "ArbitraryPrecisionFloatingPointALTERA" ], "version" : "None" }, { @@ -9649,7 +9811,7 @@ { "kind" : "LiteralInteger", "name" : "Rounding" }, { "kind" : "LiteralInteger", "name" : "Accuracy" } ], - "capabilities" : [ "ArbitraryPrecisionFloatingPointINTEL" ], + "capabilities" : [ "ArbitraryPrecisionFloatingPointALTERA" ], "version" : "None" }, { @@ -9666,7 +9828,7 @@ { "kind" : "LiteralInteger", "name" : "Rounding" }, { "kind" : "LiteralInteger", "name" : "Accuracy" } ], - "capabilities" : [ "ArbitraryPrecisionFloatingPointINTEL" ], + "capabilities" : [ "ArbitraryPrecisionFloatingPointALTERA" ], "version" : "None" }, { @@ -9683,7 +9845,7 @@ { "kind" : "LiteralInteger", "name" : "Rounding" }, { "kind" : "LiteralInteger", "name" : "Accuracy" } ], - "capabilities" : [ "ArbitraryPrecisionFloatingPointINTEL" ], + "capabilities" : [ "ArbitraryPrecisionFloatingPointALTERA" ], "version" : "None" }, { @@ -9702,7 +9864,7 @@ { "kind" : "LiteralInteger", "name" : "Rounding" }, { "kind" : "LiteralInteger", "name" : "Accuracy" } ], - "capabilities" : [ "ArbitraryPrecisionFloatingPointINTEL" ], + "capabilities" : [ "ArbitraryPrecisionFloatingPointALTERA" ], "version" : "None" }, { @@ -9721,7 +9883,7 @@ { "kind" : "LiteralInteger", "name" : "Rounding" }, { "kind" : "LiteralInteger", "name" : "Accuracy" } ], - "capabilities" : [ "ArbitraryPrecisionFloatingPointINTEL" ], + "capabilities" : [ "ArbitraryPrecisionFloatingPointALTERA" ], "version" : "None" }, { @@ -9740,7 +9902,7 @@ { "kind" : "LiteralInteger", "name" : "Rounding" }, { "kind" : "LiteralInteger", "name" : "Accuracy" } ], - "capabilities" : [ "ArbitraryPrecisionFloatingPointINTEL" ], + "capabilities" : [ "ArbitraryPrecisionFloatingPointALTERA" ], "version" : "None" }, { @@ -9759,7 +9921,7 @@ { "kind" : "LiteralInteger", "name" : "Rounding" }, { "kind" : "LiteralInteger", "name" : "Accuracy" } ], - "capabilities" : [ "ArbitraryPrecisionFloatingPointINTEL" ], + "capabilities" : [ "ArbitraryPrecisionFloatingPointALTERA" ], "version" : "None" }, { @@ -9811,8 +9973,9 @@ "version" : "None" }, { - "opname" : "OpFixedSqrtINTEL", + "opname" : "OpFixedSqrtALTERA", "class" : "@exclude", + "aliases" : [ "OpFixedSqrtINTEL" ], "opcode" : 5923, "operands" : [ { "kind" : "IdResultType" }, @@ -9824,12 +9987,13 @@ { "kind" : "LiteralInteger", "name" : "Q" }, { "kind" : "LiteralInteger", "name" : "O" } ], - "capabilities" : [ "ArbitraryPrecisionFixedPointINTEL" ], + "capabilities" : [ "ArbitraryPrecisionFixedPointALTERA" ], "version" : "None" }, { - "opname" : "OpFixedRecipINTEL", + "opname" : "OpFixedRecipALTERA", "class" : "@exclude", + "aliases" : [ "OpFixedRecipINTEL" ], "opcode" : 5924, "operands" : [ { "kind" : "IdResultType" }, @@ -9841,12 +10005,13 @@ { "kind" : "LiteralInteger", "name" : "Q" }, { "kind" : "LiteralInteger", "name" : "O" } ], - "capabilities" : [ "ArbitraryPrecisionFixedPointINTEL" ], + "capabilities" : [ "ArbitraryPrecisionFixedPointALTERA" ], "version" : "None" }, { - "opname" : "OpFixedRsqrtINTEL", + "opname" : "OpFixedRsqrtALTERA", "class" : "@exclude", + "aliases" : [ "OpFixedRsqrtINTEL" ], "opcode" : 5925, "operands" : [ { "kind" : "IdResultType" }, @@ -9858,12 +10023,13 @@ { "kind" : "LiteralInteger", "name" : "Q" }, { "kind" : "LiteralInteger", "name" : "O" } ], - "capabilities" : [ "ArbitraryPrecisionFixedPointINTEL" ], + "capabilities" : [ "ArbitraryPrecisionFixedPointALTERA" ], "version" : "None" }, { - "opname" : "OpFixedSinINTEL", + "opname" : "OpFixedSinALTERA", "class" : "@exclude", + "aliases" : [ "OpFixedSinINTEL" ], "opcode" : 5926, "operands" : [ { "kind" : "IdResultType" }, @@ -9875,12 +10041,13 @@ { "kind" : "LiteralInteger", "name" : "Q" }, { "kind" : "LiteralInteger", "name" : "O" } ], - "capabilities" : [ "ArbitraryPrecisionFixedPointINTEL" ], + "capabilities" : [ "ArbitraryPrecisionFixedPointALTERA" ], "version" : "None" }, { - "opname" : "OpFixedCosINTEL", + "opname" : "OpFixedCosALTERA", "class" : "@exclude", + "aliases" : [ "OpFixedCosINTEL" ], "opcode" : 5927, "operands" : [ { "kind" : "IdResultType" }, @@ -9892,12 +10059,13 @@ { "kind" : "LiteralInteger", "name" : "Q" }, { "kind" : "LiteralInteger", "name" : "O" } ], - "capabilities" : [ "ArbitraryPrecisionFixedPointINTEL" ], + "capabilities" : [ "ArbitraryPrecisionFixedPointALTERA" ], "version" : "None" }, { - "opname" : "OpFixedSinCosINTEL", + "opname" : "OpFixedSinCosALTERA", "class" : "@exclude", + "aliases" : [ "OpFixedSinCosINTEL" ], "opcode" : 5928, "operands" : [ { "kind" : "IdResultType" }, @@ -9909,12 +10077,13 @@ { "kind" : "LiteralInteger", "name" : "Q" }, { "kind" : "LiteralInteger", "name" : "O" } ], - "capabilities" : [ "ArbitraryPrecisionFixedPointINTEL" ], + "capabilities" : [ "ArbitraryPrecisionFixedPointALTERA" ], "version" : "None" }, { - "opname" : "OpFixedSinPiINTEL", + "opname" : "OpFixedSinPiALTERA", "class" : "@exclude", + "aliases" : [ "OpFixedSinPiINTEL" ], "opcode" : 5929, "operands" : [ { "kind" : "IdResultType" }, @@ -9926,12 +10095,13 @@ { "kind" : "LiteralInteger", "name" : "Q" }, { "kind" : "LiteralInteger", "name" : "O" } ], - "capabilities" : [ "ArbitraryPrecisionFixedPointINTEL" ], + "capabilities" : [ "ArbitraryPrecisionFixedPointALTERA" ], "version" : "None" }, { - "opname" : "OpFixedCosPiINTEL", + "opname" : "OpFixedCosPiALTERA", "class" : "@exclude", + "aliases" : [ "OpFixedCosPiINTEL" ], "opcode" : 5930, "operands" : [ { "kind" : "IdResultType" }, @@ -9943,12 +10113,13 @@ { "kind" : "LiteralInteger", "name" : "Q" }, { "kind" : "LiteralInteger", "name" : "O" } ], - "capabilities" : [ "ArbitraryPrecisionFixedPointINTEL" ], + "capabilities" : [ "ArbitraryPrecisionFixedPointALTERA" ], "version" : "None" }, { - "opname" : "OpFixedSinCosPiINTEL", + "opname" : "OpFixedSinCosPiALTERA", "class" : "@exclude", + "aliases" : [ "OpFixedSinCosPiINTEL" ], "opcode" : 5931, "operands" : [ { "kind" : "IdResultType" }, @@ -9960,12 +10131,13 @@ { "kind" : "LiteralInteger", "name" : "Q" }, { "kind" : "LiteralInteger", "name" : "O" } ], - "capabilities" : [ "ArbitraryPrecisionFixedPointINTEL" ], + "capabilities" : [ "ArbitraryPrecisionFixedPointALTERA" ], "version" : "None" }, { - "opname" : "OpFixedLogINTEL", + "opname" : "OpFixedLogALTERA", "class" : "@exclude", + "aliases" : [ "OpFixedLogINTEL" ], "opcode" : 5932, "operands" : [ { "kind" : "IdResultType" }, @@ -9977,12 +10149,13 @@ { "kind" : "LiteralInteger", "name" : "Q" }, { "kind" : "LiteralInteger", "name" : "O" } ], - "capabilities" : [ "ArbitraryPrecisionFixedPointINTEL" ], + "capabilities" : [ "ArbitraryPrecisionFixedPointALTERA" ], "version" : "None" }, { - "opname" : "OpFixedExpINTEL", + "opname" : "OpFixedExpALTERA", "class" : "@exclude", + "aliases" : [ "OpFixedExpINTEL" ], "opcode" : 5933, "operands" : [ { "kind" : "IdResultType" }, @@ -9994,36 +10167,39 @@ { "kind" : "LiteralInteger", "name" : "Q" }, { "kind" : "LiteralInteger", "name" : "O" } ], - "capabilities" : [ "ArbitraryPrecisionFixedPointINTEL" ], + "capabilities" : [ "ArbitraryPrecisionFixedPointALTERA" ], "version" : "None" }, { - "opname" : "OpPtrCastToCrossWorkgroupINTEL", + "opname" : "OpPtrCastToCrossWorkgroupALTERA", "class" : "@exclude", + "aliases" : [ "OpPtrCastToCrossWorkgroupINTEL" ], "opcode" : 5934, "operands" : [ { "kind" : "IdResultType" }, { "kind" : "IdResult" }, { "kind" : "IdRef", "name" : "Pointer" } ], - "capabilities" : [ "USMStorageClassesINTEL" ], + "capabilities" : [ "USMStorageClassesALTERA" ], "version" : "None" }, { - "opname" : "OpCrossWorkgroupCastToPtrINTEL", + "opname" : "OpCrossWorkgroupCastToPtrALTERA", "class" : "@exclude", + "aliases" : [ "OpCrossWorkgroupCastToPtrINTEL" ], "opcode" : 5938, "operands" : [ { "kind" : "IdResultType" }, { "kind" : "IdResult" }, { "kind" : "IdRef", "name" : "Pointer" } ], - "capabilities" : [ "USMStorageClassesINTEL" ], + "capabilities" : [ "USMStorageClassesALTERA" ], "version" : "None" }, { - "opname" : "OpReadPipeBlockingINTEL", - "class" : "Pipe", + "opname" : "OpReadPipeBlockingALTERA", + "class" : "@exclude", + "aliases" : [ "OpReadPipeBlockingINTEL" ], "opcode" : 5946, "operands" : [ { "kind" : "IdResultType" }, @@ -10031,13 +10207,13 @@ { "kind" : "IdRef", "name" : "Packet Size" }, { "kind" : "IdRef", "name" : "Packet Alignment" } ], - "capabilities" : [ "BlockingPipesINTEL" ], - "extensions" : [ "SPV_INTEL_blocking_pipes" ], + "capabilities" : [ "BlockingPipesALTERA" ], "version" : "None" }, { - "opname" : "OpWritePipeBlockingINTEL", - "class" : "Pipe", + "opname" : "OpWritePipeBlockingALTERA", + "class" : "@exclude", + "aliases" : [ "OpWritePipeBlockingINTEL" ], "opcode" : 5947, "operands" : [ { "kind" : "IdResultType" }, @@ -10045,21 +10221,20 @@ { "kind" : "IdRef", "name" : "Packet Size" }, { "kind" : "IdRef", "name" : "Packet Alignment" } ], - "capabilities" : [ "BlockingPipesINTEL" ], - "extensions" : [ "SPV_INTEL_blocking_pipes" ], + "capabilities" : [ "BlockingPipesALTERA" ], "version" : "None" }, { - "opname" : "OpFPGARegINTEL", - "class" : "Reserved", + "opname" : "OpFPGARegALTERA", + "class" : "@exclude", + "aliases" : [ "OpFPGARegINTEL" ], "opcode" : 5949, "operands" : [ { "kind" : "IdResultType" }, { "kind" : "IdResult" }, { "kind" : "IdRef", "name" : "Input" } ], - "capabilities" : [ "FPGARegINTEL" ], - "extensions" : [ "SPV_INTEL_fpga_reg" ], + "capabilities" : [ "FPGARegALTERA" ], "version" : "None" }, { @@ -10515,8 +10690,9 @@ "version" : "None" }, { - "opname" : "OpTaskSequenceCreateINTEL", - "class" : "Reserved", + "opname" : "OpTaskSequenceCreateALTERA", + "class" : "@exclude", + "aliases" : [ "OpTaskSequenceCreateINTEL" ], "opcode" : 6163, "operands" : [ { "kind" : "IdResultType" }, @@ -10527,50 +10703,54 @@ { "kind" : "LiteralInteger", "name" : "GetCapacity" }, { "kind" : "LiteralInteger", "name" : "AsyncCapacity" } ], - "capabilities" : [ "TaskSequenceINTEL" ], + "capabilities" : [ "TaskSequenceALTERA" ], "version" : "None" }, { - "opname" : "OpTaskSequenceAsyncINTEL", - "class" : "Reserved", + "opname" : "OpTaskSequenceAsyncALTERA", + "class" : "@exclude", + "aliases" : [ "OpTaskSequenceAsyncINTEL" ], "opcode" : 6164, "operands" : [ { "kind" : "IdRef", "name" : "Sequence" }, { "kind" : "IdRef", "quantifier" : "*", "name" : "Arguments" } ], - "capabilities" : [ "TaskSequenceINTEL" ], + "capabilities" : [ "TaskSequenceALTERA" ], "version" : "None" }, { - "opname" : "OpTaskSequenceGetINTEL", - "class" : "Reserved", + "opname" : "OpTaskSequenceGetALTERA", + "class" : "@exclude", + "aliases" : [ "OpTaskSequenceGetINTEL" ], "opcode" : 6165, "operands" : [ { "kind" : "IdResultType" }, { "kind" : "IdResult" }, { "kind" : "IdRef", "name" : "Sequence" } ], - "capabilities" : [ "TaskSequenceINTEL" ], + "capabilities" : [ "TaskSequenceALTERA" ], "version" : "None" }, { - "opname" : "OpTaskSequenceReleaseINTEL", - "class" : "Reserved", + "opname" : "OpTaskSequenceReleaseALTERA", + "class" : "@exclude", + "aliases" : [ "OpTaskSequenceReleaseINTEL" ], "opcode" : 6166, "operands" : [ { "kind" : "IdRef", "name" : "Sequence" } ], - "capabilities" : [ "TaskSequenceINTEL" ], + "capabilities" : [ "TaskSequenceALTERA" ], "version" : "None" }, { - "opname" : "OpTypeTaskSequenceINTEL", - "class" : "Type-Declaration", + "opname" : "OpTypeTaskSequenceALTERA", + "class" : "@exclude", + "aliases" : [ "OpTypeTaskSequenceINTEL" ], "opcode" : 6199, "operands" : [ { "kind" : "IdResult" } ], - "capabilities" : [ "TaskSequenceINTEL" ], + "capabilities" : [ "TaskSequenceALTERA" ], "version": "None" }, { @@ -10710,6 +10890,114 @@ "capabilities" : [ "TernaryBitwiseFunctionINTEL" ], "version" : "None" }, + { + "opname" : "OpUntypedVariableLengthArrayINTEL", + "class" : "Memory", + "opcode" : 6244, + "operands" : [ + { "kind" : "IdResultType" }, + { "kind" : "IdResult" }, + { "kind" : "IdRef", "name" : "Element Type" }, + { "kind" : "IdRef", "name" : "Length" } + ], + "capabilities" : [ "UntypedVariableLengthArrayINTEL" ], + "version" : "None" + }, + { + "opname" : "OpConditionalExtensionINTEL", + "class" : "Extension", + "opcode" : 6248, + "operands" : [ + { "kind" : "IdRef", "name" : "Condition" }, + { "kind" : "LiteralString", "name" : "Name" } + ], + "capabilities" : [ "SpecConditionalINTEL" ], + "provisional" : true, + "version" : "None" + }, + { + "opname" : "OpConditionalEntryPointINTEL", + "class" : "Mode-Setting", + "opcode" : 6249, + "operands" : [ + { "kind" : "IdRef", "name" : "Condition" }, + { "kind" : "ExecutionModel" }, + { "kind" : "IdRef", "name" : "Entry Point" }, + { "kind" : "LiteralString", "name" : "Name" }, + { "kind" : "IdRef", "quantifier" : "*", "name" : "Interface" } + ], + "capabilities" : [ "SpecConditionalINTEL" ], + "provisional" : true, + "version" : "None" + }, + { + "opname" : "OpConditionalCapabilityINTEL", + "class" : "Mode-Setting", + "opcode" : 6250, + "operands" : [ + { "kind" : "IdRef", "name" : "Condition" }, + { "kind" : "Capability", "name" : "Capability" } + ], + "capabilities" : [ "SpecConditionalINTEL" ], + "provisional" : true, + "version" : "None" + }, + { + "opname" : "OpSpecConstantTargetINTEL", + "class" : "Constant-Creation", + "opcode" : 6251, + "operands" : [ + { "kind" : "IdResultType" }, + { "kind" : "IdResult" }, + { "kind" : "LiteralInteger", "name" : "Target" }, + { "kind" : "LiteralInteger", "quantifier" : "*", "name" : "Features" } + ], + "capabilities" : [ "FunctionVariantsINTEL" ], + "provisional" : true, + "version": "None" + }, + { + "opname" : "OpSpecConstantArchitectureINTEL", + "class" : "Constant-Creation", + "opcode" : 6252, + "operands" : [ + { "kind" : "IdResultType" }, + { "kind" : "IdResult" }, + { "kind" : "LiteralInteger", "name" : "Category" }, + { "kind" : "LiteralInteger", "name" : "Family" }, + { "kind" : "LiteralInteger", "name" : "Opcode" }, + { "kind" : "LiteralInteger", "name" : "Architecture" } + ], + "capabilities" : [ "FunctionVariantsINTEL" ], + "provisional" : true, + "version": "None" + }, + { + "opname" : "OpSpecConstantCapabilitiesINTEL", + "class" : "Constant-Creation", + "opcode" : 6253, + "operands" : [ + { "kind" : "IdResultType" }, + { "kind" : "IdResult" }, + { "kind" : "Capability", "quantifier" : "*", "name" : "Capabilities" } + ], + "capabilities" : [ "FunctionVariantsINTEL" ], + "provisional" : true, + "version": "None" + }, + { + "opname" : "OpConditionalCopyObjectINTEL", + "class" : "Composite", + "opcode" : 6254, + "operands" : [ + { "kind" : "IdResultType" }, + { "kind" : "IdResult" }, + { "kind" : "IdRef", "quantifier" : "*", "name" : "Condition 0, Operand 0, +\nCondition 1, Operand 1, +\n..." } + ], + "capabilities" : [ "SpecConditionalINTEL" ], + "provisional" : true, + "version" : "None" + }, { "opname" : "OpGroupIMulKHR", "class" : "Group", @@ -10861,6 +11149,45 @@ ], "capabilities" : [ "MaskedGatherScatterINTEL" ], "version" : "None" + }, + { + "opname" : "OpConvertHandleToImageINTEL", + "class" : "Image", + "opcode" : 6529, + "operands" : [ + { "kind" : "IdResultType" }, + { "kind" : "IdResult" }, + { "kind" : "IdRef", "name" : "Operand" } + ], + "capabilities" : [ "BindlessImagesINTEL" ], + "provisional" : true, + "version" : "None" + }, + { + "opname" : "OpConvertHandleToSamplerINTEL", + "class" : "Image", + "opcode" : 6530, + "operands" : [ + { "kind" : "IdResultType" }, + { "kind" : "IdResult" }, + { "kind" : "IdRef", "name" : "Operand" } + ], + "capabilities" : [ "BindlessImagesINTEL" ], + "provisional" : true, + "version" : "None" + }, + { + "opname" : "OpConvertHandleToSampledImageINTEL", + "class" : "Image", + "opcode" : 6531, + "operands" : [ + { "kind" : "IdResultType" }, + { "kind" : "IdResult" }, + { "kind" : "IdRef", "name" : "Operand" } + ], + "capabilities" : [ "BindlessImagesINTEL" ], + "provisional" : true, + "version" : "None" } ], "operand_kinds" : [ @@ -11154,90 +11481,100 @@ "version" : "1.4" }, { - "enumerant" : "InitiationIntervalINTEL", + "enumerant" : "InitiationIntervalALTERA", + "aliases" : [ "InitiationIntervalINTEL" ], "value" : "0x10000", "parameters" : [ { "kind" : "LiteralInteger" } ], - "capabilities" : [ "FPGALoopControlsINTEL" ], + "capabilities" : [ "FPGALoopControlsALTERA" ], "version" : "None" }, { - "enumerant" : "MaxConcurrencyINTEL", + "enumerant" : "MaxConcurrencyALTERA", + "aliases" : [ "MaxConcurrencyINTEL" ], "value" : "0x20000", "parameters" : [ { "kind" : "LiteralInteger" } ], - "capabilities" : [ "FPGALoopControlsINTEL" ], + "capabilities" : [ "FPGALoopControlsALTERA" ], "version" : "None" }, { - "enumerant" : "DependencyArrayINTEL", + "enumerant" : "DependencyArrayALTERA", + "aliases" : [ "DependencyArrayINTEL" ], "value" : "0x40000", "parameters" : [ { "kind" : "LiteralInteger" } ], - "capabilities" : [ "FPGALoopControlsINTEL" ], + "capabilities" : [ "FPGALoopControlsALTERA" ], "version" : "None" }, { - "enumerant" : "PipelineEnableINTEL", + "enumerant" : "PipelineEnableALTERA", + "aliases" : [ "PipelineEnableINTEL" ], "value" : "0x80000", "parameters" : [ { "kind" : "LiteralInteger" } ], - "capabilities" : [ "FPGALoopControlsINTEL" ], + "capabilities" : [ "FPGALoopControlsALTERA" ], "version" : "None" }, { - "enumerant" : "LoopCoalesceINTEL", + "enumerant" : "LoopCoalesceALTERA", + "aliases" : [ "LoopCoalesceINTEL" ], "value" : "0x100000", "parameters" : [ { "kind" : "LiteralInteger" } ], - "capabilities" : [ "FPGALoopControlsINTEL" ], + "capabilities" : [ "FPGALoopControlsALTERA" ], "version" : "None" }, { - "enumerant" : "MaxInterleavingINTEL", + "enumerant" : "MaxInterleavingALTERA", + "aliases" : [ "MaxInterleavingINTEL" ], "value" : "0x200000", "parameters" : [ { "kind" : "LiteralInteger" } ], - "capabilities" : [ "FPGALoopControlsINTEL" ], + "capabilities" : [ "FPGALoopControlsALTERA" ], "version" : "None" }, { - "enumerant" : "SpeculatedIterationsINTEL", + "enumerant" : "SpeculatedIterationsALTERA", + "aliases" : [ "SpeculatedIterationsINTEL" ], "value" : "0x400000", "parameters" : [ { "kind" : "LiteralInteger" } ], - "capabilities" : [ "FPGALoopControlsINTEL" ], + "capabilities" : [ "FPGALoopControlsALTERA" ], "version" : "None" }, { - "enumerant" : "NoFusionINTEL", + "enumerant" : "NoFusionALTERA", + "aliases" : [ "NoFusionINTEL" ], "value" : "0x800000", - "capabilities" : [ "FPGALoopControlsINTEL" ], + "capabilities" : [ "FPGALoopControlsALTERA" ], "version" : "None" }, { - "enumerant" : "LoopCountINTEL", + "enumerant" : "LoopCountALTERA", + "aliases" : [ "LoopCountINTEL" ], "value" : "0x1000000", "parameters" : [ { "kind" : "LiteralInteger" } ], - "capabilities" : [ "FPGALoopControlsINTEL" ], + "capabilities" : [ "FPGALoopControlsALTERA" ], "version" : "None" }, { - "enumerant" : "MaxReinvocationDelayINTEL", + "enumerant" : "MaxReinvocationDelayALTERA", + "aliases" : [ "MaxReinvocationDelayINTEL" ], "value" : "0x2000000", "parameters" : [ { "kind" : "LiteralInteger" } ], - "capabilities" : [ "FPGALoopControlsINTEL" ], + "capabilities" : [ "FPGALoopControlsALTERA" ], "version" : "None" } ] @@ -12385,7 +12722,7 @@ "enumerant" : "DerivativeGroupQuadsKHR", "aliases" : ["DerivativeGroupQuadsNV"], "value" : 5289, - "capabilities" : [ "ComputeDerivativeGroupQuadsNV", "ComputeDerivativeGroupQuadsKHR" ], + "capabilities" : [ "ComputeDerivativeGroupQuadsKHR" ], "extensions" : [ "SPV_NV_compute_shader_derivatives", "SPV_KHR_compute_shader_derivatives" ], "version" : "None" }, @@ -12393,7 +12730,7 @@ "enumerant" : "DerivativeGroupLinearKHR", "aliases" : ["DerivativeGroupLinearNV"], "value" : 5290, - "capabilities" : [ "ComputeDerivativeGroupLinearNV", "ComputeDerivativeGroupLinearKHR" ], + "capabilities" : [ "ComputeDerivativeGroupLinearKHR" ], "extensions" : [ "SPV_NV_compute_shader_derivatives", "SPV_KHR_compute_shader_derivatives" ], "version" : "None" }, @@ -12447,6 +12784,12 @@ "extensions" : [ "SPV_EXT_fragment_shader_interlock" ], "version" : "None" }, + { + "enumerant" : "Shader64BitIndexingEXT", + "value" : 5427, + "capabilities" : [ "Shader64BitIndexingEXT" ], + "version" : "None" + }, { "enumerant" : "SharedLocalMemorySizeINTEL", "value" : 5618, @@ -12789,21 +13132,17 @@ "version" : "None" }, { - "enumerant" : "DeviceOnlyINTEL", + "enumerant" : "DeviceOnlyALTERA", + "aliases" : [ "DeviceOnlyINTEL" ], "value" : 5936, - "extensions" : [ - "SPV_INTEL_usm_storage_classes" - ], - "capabilities" : [ "USMStorageClassesINTEL" ], + "capabilities" : [ "USMStorageClassesALTERA" ], "version" : "None" }, { - "enumerant" : "HostOnlyINTEL", + "enumerant" : "HostOnlyALTERA", + "aliases" : [ "HostOnlyINTEL" ], "value" : 5937, - "extensions" : [ - "SPV_INTEL_usm_storage_classes" - ], - "capabilities" : [ "USMStorageClassesINTEL" ], + "capabilities" : [ "USMStorageClassesALTERA" ], "version" : "None" } ] @@ -13457,49 +13796,49 @@ { "enumerant" : "TRN", "value" : 0, - "capabilities" : [ "ArbitraryPrecisionFixedPointINTEL"], + "capabilities" : [ "ArbitraryPrecisionFixedPointALTERA"], "version" : "None" }, { "enumerant" : "TRN_ZERO", "value" : 1, - "capabilities" : [ "ArbitraryPrecisionFixedPointINTEL"], + "capabilities" : [ "ArbitraryPrecisionFixedPointALTERA"], "version" : "None" }, { "enumerant" : "RND", "value" : 2, - "capabilities" : [ "ArbitraryPrecisionFixedPointINTEL"], + "capabilities" : [ "ArbitraryPrecisionFixedPointALTERA"], "version" : "None" }, { "enumerant" : "RND_ZERO", "value" : 3, - "capabilities" : [ "ArbitraryPrecisionFixedPointINTEL"], + "capabilities" : [ "ArbitraryPrecisionFixedPointALTERA"], "version" : "None" }, { "enumerant" : "RND_INF", "value" : 4, - "capabilities" : [ "ArbitraryPrecisionFixedPointINTEL"], + "capabilities" : [ "ArbitraryPrecisionFixedPointALTERA"], "version" : "None" }, { "enumerant" : "RND_MIN_INF", "value" : 5, - "capabilities" : [ "ArbitraryPrecisionFixedPointINTEL"], + "capabilities" : [ "ArbitraryPrecisionFixedPointALTERA"], "version" : "None" }, { "enumerant" : "RND_CONV", "value" : 6, - "capabilities" : [ "ArbitraryPrecisionFixedPointINTEL"], + "capabilities" : [ "ArbitraryPrecisionFixedPointALTERA"], "version" : "None" }, { "enumerant" : "RND_CONV_ODD", "value" : 7, - "capabilities" : [ "ArbitraryPrecisionFixedPointINTEL"], + "capabilities" : [ "ArbitraryPrecisionFixedPointALTERA"], "version" : "None" } ] @@ -13529,25 +13868,25 @@ { "enumerant" : "WRAP", "value" : 0, - "capabilities" : [ "ArbitraryPrecisionFixedPointINTEL"], + "capabilities" : [ "ArbitraryPrecisionFixedPointALTERA"], "version" : "None" }, { "enumerant" : "SAT", "value" : 1, - "capabilities" : [ "ArbitraryPrecisionFixedPointINTEL"], + "capabilities" : [ "ArbitraryPrecisionFixedPointALTERA"], "version" : "None" }, { "enumerant" : "SAT_ZERO", "value" : 2, - "capabilities" : [ "ArbitraryPrecisionFixedPointINTEL"], + "capabilities" : [ "ArbitraryPrecisionFixedPointALTERA"], "version" : "None" }, { "enumerant" : "SAT_SYM", "value" : 3, - "capabilities" : [ "ArbitraryPrecisionFixedPointINTEL"], + "capabilities" : [ "ArbitraryPrecisionFixedPointALTERA"], "version" : "None" } ] @@ -13684,9 +14023,10 @@ "version": "1.0" }, { - "enumerant" : "RuntimeAlignedINTEL", + "enumerant" : "RuntimeAlignedALTERA", + "aliases" : [ "RuntimeAlignedINTEL" ], "value" : 5940, - "capabilities" : [ "RuntimeAlignedAttributeINTEL" ], + "capabilities" : [ "RuntimeAlignedAttributeALTERA" ], "version": "1.0" } ] @@ -14040,6 +14380,12 @@ ], "version" : "1.2" }, + { + "enumerant" : "SaturatedToLargestFloat8NormalConversionEXT", + "value" : 4216, + "capabilities" : [ "Float8EXT" ], + "version": "None" + }, { "enumerant" : "NoSignedWrap", "value" : 4469, @@ -14378,188 +14724,198 @@ "version" : "None" }, { - "enumerant" : "RegisterINTEL", + "enumerant" : "RegisterALTERA", + "aliases" : [ "RegisterINTEL" ], "value" : 5825, - "capabilities" : [ "FPGAMemoryAttributesINTEL" ], - "extensions" : [ "SPV_INTEL_fpga_memory_attributes" ], + "capabilities" : [ "FPGAMemoryAttributesALTERA" ], "version" : "None" }, { - "enumerant" : "MemoryINTEL", + "enumerant" : "MemoryALTERA", + "aliases" : [ "MemoryINTEL" ], "value" : 5826, "parameters" : [ { "kind" : "LiteralString", "name" : "Memory Type" } ], - "capabilities" : [ "FPGAMemoryAttributesINTEL" ], - "extensions" : [ "SPV_INTEL_fpga_memory_attributes" ], + "capabilities" : [ "FPGAMemoryAttributesALTERA" ], "version" : "None" }, { - "enumerant" : "NumbanksINTEL", + "enumerant" : "NumbanksALTERA", + "aliases" : [ "NumbanksINTEL" ], "value" : 5827, "parameters" : [ { "kind" : "LiteralInteger", "name" : "Banks" } ], - "capabilities" : [ "FPGAMemoryAttributesINTEL" ], - "extensions" : [ "SPV_INTEL_fpga_memory_attributes" ], + "capabilities" : [ "FPGAMemoryAttributesALTERA" ], "version" : "None" }, { - "enumerant" : "BankwidthINTEL", + "enumerant" : "BankwidthALTERA", + "aliases" : [ "BankwidthINTEL" ], "value" : 5828, "parameters" : [ { "kind" : "LiteralInteger", "name" : "Bank Width" } ], - "capabilities" : [ "FPGAMemoryAttributesINTEL" ], - "extensions" : [ "SPV_INTEL_fpga_memory_attributes" ], + "capabilities" : [ "FPGAMemoryAttributesALTERA" ], "version" : "None" }, { - "enumerant" : "MaxPrivateCopiesINTEL", + "enumerant" : "MaxPrivateCopiesALTERA", + "aliases" : [ "MaxPrivateCopiesINTEL" ], "value" : 5829, "parameters" : [ { "kind" : "LiteralInteger", "name" : "Maximum Copies" } ], - "capabilities" : [ "FPGAMemoryAttributesINTEL" ], - "extensions" : [ "SPV_INTEL_fpga_memory_attributes" ], + "capabilities" : [ "FPGAMemoryAttributesALTERA" ], "version" : "None" }, { - "enumerant" : "SinglepumpINTEL", + "enumerant" : "SinglepumpALTERA", + "aliases" : [ "SinglepumpINTEL" ], "value" : 5830, - "capabilities" : [ "FPGAMemoryAttributesINTEL" ], - "extensions" : [ "SPV_INTEL_fpga_memory_attributes" ], + "capabilities" : [ "FPGAMemoryAttributesALTERA" ], "version" : "None" }, { - "enumerant" : "DoublepumpINTEL", + "enumerant" : "DoublepumpALTERA", + "aliases" : [ "DoublepumpINTEL" ], "value" : 5831, - "capabilities" : [ "FPGAMemoryAttributesINTEL" ], - "extensions" : [ "SPV_INTEL_fpga_memory_attributes" ], + "capabilities" : [ "FPGAMemoryAttributesALTERA" ], "version" : "None" }, { - "enumerant" : "MaxReplicatesINTEL", + "enumerant" : "MaxReplicatesALTERA", + "aliases" : [ "MaxReplicatesINTEL" ], "value" : 5832, "parameters" : [ { "kind" : "LiteralInteger", "name" : "Maximum Replicates" } ], - "capabilities" : [ "FPGAMemoryAttributesINTEL" ], - "extensions" : [ "SPV_INTEL_fpga_memory_attributes" ], + "capabilities" : [ "FPGAMemoryAttributesALTERA" ], "version" : "None" }, { - "enumerant" : "SimpleDualPortINTEL", + "enumerant" : "SimpleDualPortALTERA", + "aliases" : [ "SimpleDualPortINTEL" ], "value" : 5833, - "capabilities" : [ "FPGAMemoryAttributesINTEL" ], - "extensions" : [ "SPV_INTEL_fpga_memory_attributes" ], + "capabilities" : [ "FPGAMemoryAttributesALTERA" ], "version" : "None" }, { - "enumerant" : "MergeINTEL", + "enumerant" : "MergeALTERA", + "aliases" : [ "MergeINTEL" ], "value" : 5834, "parameters" : [ { "kind" : "LiteralString", "name" : "Merge Key" }, { "kind" : "LiteralString", "name" : "Merge Type" } ], - "capabilities" : [ "FPGAMemoryAttributesINTEL" ], - "extensions" : [ "SPV_INTEL_fpga_memory_attributes" ], + "capabilities" : [ "FPGAMemoryAttributesALTERA" ], "version" : "None" }, { - "enumerant" : "BankBitsINTEL", + "enumerant" : "BankBitsALTERA", + "aliases" : [ "BankBitsINTEL" ], "value" : 5835, "parameters" : [ { "kind" : "LiteralInteger", "quantifier" : "*", "name" : "Bank Bits" } ], - "capabilities" : [ "FPGAMemoryAttributesINTEL" ], - "extensions" : [ "SPV_INTEL_fpga_memory_attributes" ], + "capabilities" : [ "FPGAMemoryAttributesALTERA" ], "version" : "None" }, { - "enumerant" : "ForcePow2DepthINTEL", + "enumerant" : "ForcePow2DepthALTERA", + "aliases" : [ "ForcePow2DepthINTEL" ], "value" : 5836, "parameters" : [ { "kind" : "LiteralInteger", "name" : "Force Key" } ], - "capabilities" : [ "FPGAMemoryAttributesINTEL" ], - "extensions" : [ "SPV_INTEL_fpga_memory_attributes" ], + "capabilities" : [ "FPGAMemoryAttributesALTERA" ], "version" : "None" }, { - "enumerant" : "StridesizeINTEL", + "enumerant" : "StridesizeALTERA", + "aliases" : [ "StridesizeINTEL" ], "value" : 5883, "parameters" : [ { "kind" : "LiteralInteger", "name" : "Stride Size" } ], - "capabilities" : [ "FPGAMemoryAttributesINTEL" ], + "capabilities" : [ "FPGAMemoryAttributesALTERA" ], "version" : "None" }, { - "enumerant" : "WordsizeINTEL", + "enumerant" : "WordsizeALTERA", + "aliases" : [ "WordsizeINTEL" ], "value" : 5884, "parameters" : [ { "kind" : "LiteralInteger", "name" : "Word Size" } ], - "capabilities" : [ "FPGAMemoryAttributesINTEL" ], + "capabilities" : [ "FPGAMemoryAttributesALTERA" ], "version" : "None" }, { - "enumerant" : "TrueDualPortINTEL", + "enumerant" : "TrueDualPortALTERA", + "aliases" : [ "TrueDualPortINTEL" ], "value" : 5885, - "capabilities" : [ "FPGAMemoryAttributesINTEL" ], + "capabilities" : [ "FPGAMemoryAttributesALTERA" ], "version" : "None" }, { - "enumerant" : "BurstCoalesceINTEL", + "enumerant" : "BurstCoalesceALTERA", + "aliases" : [ "BurstCoalesceINTEL" ], "value" : 5899, - "capabilities" : [ "FPGAMemoryAccessesINTEL" ], + "capabilities" : [ "FPGAMemoryAccessesALTERA" ], "version" : "None" }, { - "enumerant" : "CacheSizeINTEL", + "enumerant" : "CacheSizeALTERA", + "aliases" : [ "CacheSizeINTEL" ], "value" : 5900, "parameters" : [ { "kind" : "LiteralInteger", "name" : "Cache Size in bytes" } ], - "capabilities" : [ "FPGAMemoryAccessesINTEL" ], + "capabilities" : [ "FPGAMemoryAccessesALTERA" ], "version" : "None" }, { - "enumerant" : "DontStaticallyCoalesceINTEL", + "enumerant" : "DontStaticallyCoalesceALTERA", + "aliases" : [ "DontStaticallyCoalesceINTEL" ], "value" : 5901, - "capabilities" : [ "FPGAMemoryAccessesINTEL" ], + "capabilities" : [ "FPGAMemoryAccessesALTERA" ], "version" : "None" }, { - "enumerant" : "PrefetchINTEL", + "enumerant" : "PrefetchALTERA", + "aliases" : [ "PrefetchINTEL" ], "value" : 5902, "parameters" : [ { "kind" : "LiteralInteger", "name" : "Prefetcher Size in bytes" } ], - "capabilities" : [ "FPGAMemoryAccessesINTEL" ], + "capabilities" : [ "FPGAMemoryAccessesALTERA" ], "version" : "None" }, { - "enumerant" : "StallEnableINTEL", + "enumerant" : "StallEnableALTERA", + "aliases" : [ "StallEnableINTEL" ], "value" : 5905, - "capabilities" : [ "FPGAClusterAttributesINTEL" ], + "capabilities" : [ "FPGAClusterAttributesALTERA" ], "version" : "None" }, { - "enumerant" : "FuseLoopsInFunctionINTEL", + "enumerant" : "FuseLoopsInFunctionALTERA", + "aliases" : [ "FuseLoopsInFunctionINTEL" ], "value" : 5907, - "capabilities" : [ "LoopFuseINTEL" ], + "capabilities" : [ "LoopFuseALTERA" ], "version" : "None" }, { - "enumerant" : "MathOpDSPModeINTEL", + "enumerant" : "MathOpDSPModeALTERA", + "aliases" : [ "MathOpDSPModeINTEL" ], "value" : 5909, "parameters" : [ { "kind" : "LiteralInteger", "name" : "Mode" }, { "kind" : "LiteralInteger", "name" : "Propagate" } ], - "capabilities" : [ "FPGADSPControlINTEL" ], + "capabilities" : [ "FPGADSPControlALTERA" ], "version" : "None" }, { @@ -14581,48 +14937,53 @@ "version" : "None" }, { - "enumerant" : "InitiationIntervalINTEL", + "enumerant" : "InitiationIntervalALTERA", + "aliases" : [ "InitiationIntervalINTEL" ], "value" : 5917, "parameters" : [ { "kind" : "LiteralInteger", "name" : "Cycles" } ], - "capabilities" : [ "FPGAInvocationPipeliningAttributesINTEL" ], + "capabilities" : [ "FPGAInvocationPipeliningAttributesALTERA" ], "version" : "None" }, { - "enumerant" : "MaxConcurrencyINTEL", + "enumerant" : "MaxConcurrencyALTERA", + "aliases" : [ "MaxConcurrencyINTEL" ], "value" : 5918, "parameters" : [ { "kind" : "LiteralInteger", "name" : "Invocations" } ], - "capabilities" : [ "FPGAInvocationPipeliningAttributesINTEL" ], + "capabilities" : [ "FPGAInvocationPipeliningAttributesALTERA" ], "version" : "None" }, { - "enumerant" : "PipelineEnableINTEL", + "enumerant" : "PipelineEnableALTERA", + "aliases" : [ "PipelineEnableINTEL" ], "value" : 5919, "parameters" : [ { "kind" : "LiteralInteger", "name" : "Enable" } ], - "capabilities" : [ "FPGAInvocationPipeliningAttributesINTEL" ], + "capabilities" : [ "FPGAInvocationPipeliningAttributesALTERA" ], "version" : "None" }, { - "enumerant" : "BufferLocationINTEL", + "enumerant" : "BufferLocationALTERA", + "aliases" : [ "BufferLocationINTEL" ], "value" : 5921, "parameters" : [ { "kind" : "LiteralInteger", "name" : "Buffer Location ID" } ], - "capabilities" : [ "FPGABufferLocationINTEL" ], + "capabilities" : [ "FPGABufferLocationALTERA" ], "version" : "None" }, { - "enumerant" : "IOPipeStorageINTEL", + "enumerant" : "IOPipeStorageALTERA", + "aliases" : [ "IOPipeStorageINTEL" ], "value" : 5944, "parameters" : [ { "kind" : "LiteralInteger", "name" : "IO Pipe ID" } ], - "capabilities" : [ "IOPipesINTEL" ], + "capabilities" : [ "IOPipesALTERA" ], "version" : "None" }, { @@ -14654,9 +15015,10 @@ "version" : "None" }, { - "enumerant" : "StallFreeINTEL", + "enumerant" : "StallFreeALTERA", + "aliases" : [ "StallFreeINTEL" ], "value" : 6151, - "capabilities" : [ "FPGAClusterAttributesV2INTEL" ], + "capabilities" : [ "FPGAClusterAttributesV2ALTERA" ], "version" : "None" }, { @@ -14669,95 +15031,106 @@ "version" : "None" }, { - "enumerant" : "LatencyControlLabelINTEL", + "enumerant" : "LatencyControlLabelALTERA", + "aliases" : [ "LatencyControlLabelINTEL" ], "value" : 6172, "parameters" : [ { "kind" : "LiteralInteger", "name" : "Latency Label" } ], - "capabilities" : [ "FPGALatencyControlINTEL" ], + "capabilities" : [ "FPGALatencyControlALTERA" ], "version" : "None" }, { - "enumerant" : "LatencyControlConstraintINTEL", + "enumerant" : "LatencyControlConstraintALTERA", + "aliases" : [ "LatencyControlConstraintINTEL" ], "value" : 6173, "parameters" : [ { "kind" : "LiteralInteger", "name" : "Relative To" }, { "kind" : "LiteralInteger", "name" : "Control Type" }, { "kind" : "LiteralInteger", "name" : "Relative Cycle" } ], - "capabilities" : [ "FPGALatencyControlINTEL" ], + "capabilities" : [ "FPGALatencyControlALTERA" ], "version" : "None" }, { - "enumerant" : "ConduitKernelArgumentINTEL", + "enumerant" : "ConduitKernelArgumentALTERA", + "aliases" : [ "ConduitKernelArgumentINTEL" ], "value" : 6175, - "capabilities" : [ "FPGAArgumentInterfacesINTEL" ], + "capabilities" : [ "FPGAArgumentInterfacesALTERA" ], "version" : "None" }, { - "enumerant" : "RegisterMapKernelArgumentINTEL", + "enumerant" : "RegisterMapKernelArgumentALTERA", + "aliases" : [ "RegisterMapKernelArgumentINTEL" ], "value" : 6176, - "capabilities" : [ "FPGAArgumentInterfacesINTEL" ], + "capabilities" : [ "FPGAArgumentInterfacesALTERA" ], "version" : "None" }, { - "enumerant" : "MMHostInterfaceAddressWidthINTEL", + "enumerant" : "MMHostInterfaceAddressWidthALTERA", + "aliases" : [ "MMHostInterfaceAddressWidthINTEL" ], "value" : 6177, - "capabilities" : [ "FPGAArgumentInterfacesINTEL" ], + "capabilities" : [ "FPGAArgumentInterfacesALTERA" ], "parameters" : [ { "kind" : "LiteralInteger", "name" : "AddressWidth" } ], "version" : "None" }, { - "enumerant" : "MMHostInterfaceDataWidthINTEL", + "enumerant" : "MMHostInterfaceDataWidthALTERA", + "aliases" : [ "MMHostInterfaceDataWidthINTEL" ], "value" : 6178, - "capabilities" : [ "FPGAArgumentInterfacesINTEL" ], + "capabilities" : [ "FPGAArgumentInterfacesALTERA" ], "parameters" : [ { "kind" : "LiteralInteger", "name" : "DataWidth" } ], "version" : "None" }, { - "enumerant" : "MMHostInterfaceLatencyINTEL", + "enumerant" : "MMHostInterfaceLatencyALTERA", + "aliases" : [ "MMHostInterfaceLatencyINTEL" ], "value" : 6179, - "capabilities" : [ "FPGAArgumentInterfacesINTEL" ], + "capabilities" : [ "FPGAArgumentInterfacesALTERA" ], "parameters" : [ { "kind" : "LiteralInteger", "name" : "Latency" } ], "version" : "None" }, { - "enumerant" : "MMHostInterfaceReadWriteModeINTEL", + "enumerant" : "MMHostInterfaceReadWriteModeALTERA", + "aliases" : [ "MMHostInterfaceReadWriteModeINTEL" ], "value" : 6180, - "capabilities" : [ "FPGAArgumentInterfacesINTEL" ], + "capabilities" : [ "FPGAArgumentInterfacesALTERA" ], "parameters" : [ { "kind" : "AccessQualifier", "name" : "ReadWriteMode" } ], "version" : "None" }, { - "enumerant" : "MMHostInterfaceMaxBurstINTEL", + "enumerant" : "MMHostInterfaceMaxBurstALTERA", + "aliases" : [ "MMHostInterfaceMaxBurstINTEL" ], "value" : 6181, - "capabilities" : [ "FPGAArgumentInterfacesINTEL" ], + "capabilities" : [ "FPGAArgumentInterfacesALTERA" ], "parameters" : [ { "kind" : "LiteralInteger", "name" : "MaxBurstCount" } ], "version" : "None" }, { - "enumerant" : "MMHostInterfaceWaitRequestINTEL", + "enumerant" : "MMHostInterfaceWaitRequestALTERA", + "aliases" : [ "MMHostInterfaceWaitRequestINTEL" ], "value" : 6182, - "capabilities" : [ "FPGAArgumentInterfacesINTEL" ], + "capabilities" : [ "FPGAArgumentInterfacesALTERA" ], "parameters" : [ { "kind" : "LiteralInteger", "name" : "Waitrequest" } ], "version" : "None" }, { - "enumerant" : "StableKernelArgumentINTEL", + "enumerant" : "StableKernelArgumentALTERA", + "aliases" : [ "StableKernelArgumentINTEL" ], "value" : 6183, - "capabilities" : [ "FPGAArgumentInterfacesINTEL" ], + "capabilities" : [ "FPGAArgumentInterfacesALTERA" ], "version" : "None" }, { @@ -14771,21 +15144,33 @@ "version" : "None" }, { - "enumerant" : "InitModeINTEL", + "enumerant" : "InitModeALTERA", + "aliases" : [ "InitModeINTEL" ], "value" : 6190, "parameters": [ { "kind" : "InitializationModeQualifier", "name" : "Trigger" } ], - "capabilities" : [ "GlobalVariableFPGADecorationsINTEL" ], + "capabilities" : [ "GlobalVariableFPGADecorationsALTERA" ], "version" : "None" }, { - "enumerant" : "ImplementInRegisterMapINTEL", + "enumerant" : "ImplementInRegisterMapALTERA", + "aliases" : [ "ImplementInRegisterMapINTEL" ], "value" : 6191, "parameters": [ { "kind" : "LiteralInteger", "name" : "Value" } ], - "capabilities" : [ "GlobalVariableFPGADecorationsINTEL" ], + "capabilities" : [ "GlobalVariableFPGADecorationsALTERA" ], + "version" : "None" + }, + { + "enumerant" : "ConditionalINTEL", + "value" : 6247, + "parameters": [ + { "kind" : "IdRef", "name" : "Condition" } + ], + "capabilities" : [ "SpecConditionalINTEL" ], + "provisional" : true, "version" : "None" }, { @@ -16223,12 +16608,31 @@ "extensions" : [ "SPV_ARM_tensors"], "version" : "None" }, + { + "enumerant" : "GraphARM", + "value" : 4191, + "extensions" : [ "SPV_ARM_graph"], + "version" : "None" + }, { "enumerant" : "CooperativeMatrixLayoutsARM", "value" : 4201, "extensions" : [ "SPV_ARM_cooperative_matrix_layouts" ], "version" : "None" }, + { + "enumerant" : "Float8EXT", + "value" : 4212, + "extensions" : [ "SPV_EXT_float8"], + "version" : "None" + }, + { + "enumerant" : "Float8CooperativeMatrixEXT", + "value" : 4213, + "capabilities" : [ "Float8EXT", "CooperativeMatrixKHR" ], + "extensions" : [ "SPV_EXT_float8"], + "version" : "None" + }, { "enumerant" : "FragmentShadingRateKHR", "value" : 4422, @@ -16410,7 +16814,6 @@ "enumerant" : "UntypedPointersKHR", "value" : 4473, "extensions" : [ "SPV_KHR_untyped_pointers" ], - "provisional" : true, "version" : "None" }, { @@ -16452,6 +16855,13 @@ "extensions" : [ "SPV_QCOM_tile_shading" ], "version" : "None" }, + { + "enumerant" : "CooperativeMatrixConversionQCOM", + "value" : 4496, + "capabilities" : [ "CooperativeMatrixKHR" ], + "extensions" : [ "SPV_QCOM_cooperative_matrix_conversion" ], + "version" : "None" + }, { "enumerant" : "TextureBlockMatch2QCOM", "value" : 4498, @@ -16920,6 +17330,12 @@ "extensions" : [ "SPV_NV_linear_swept_spheres" ], "version" : "None" }, + { + "enumerant" : "Shader64BitIndexingEXT", + "value" : 5426, + "extensions" : [ "SPV_EXT_shader_64bit_indexing" ], + "version" : "None" + }, { "enumerant" : "CooperativeMatrixReductionsNV", "value" : 5430, @@ -17097,9 +17513,10 @@ "version" : "None" }, { - "enumerant" : "FPGAMemoryAttributesINTEL", + "enumerant" : "FPGAMemoryAttributesALTERA", + "aliases" : [ "FPGAMemoryAttributesINTEL" ], "value" : 5824, - "extensions" : [ "SPV_INTEL_fpga_memory_attributes" ], + "extensions" : [ "SPV_ALTERA_fpga_memory_attributes", "SPV_INTEL_fpga_memory_attributes" ], "version" : "None" }, { @@ -17110,15 +17527,17 @@ "version" : "None" }, { - "enumerant" : "ArbitraryPrecisionIntegersINTEL", + "enumerant" : "ArbitraryPrecisionIntegersALTERA", + "aliases" : [ "ArbitraryPrecisionIntegersINTEL" ], "value" : 5844, - "extensions" : [ "SPV_INTEL_arbitrary_precision_integers" ], + "extensions" : [ "SPV_ALTERA_arbitrary_precision_integers", "SPV_INTEL_arbitrary_precision_integers" ], "version" : "None" }, { - "enumerant" : "ArbitraryPrecisionFloatingPointINTEL", + "enumerant" : "ArbitraryPrecisionFloatingPointALTERA", + "aliases" : [ "ArbitraryPrecisionFloatingPointINTEL" ], "value" : 5845, - "extensions" : [ "SPV_INTEL_arbitrary_precision_floating_point" ], + "extensions" : [ "SPV_ALTERA_arbitrary_precision_floating_point", "SPV_INTEL_arbitrary_precision_floating_point" ], "version" : "None" }, { @@ -17128,9 +17547,10 @@ "version" : "None" }, { - "enumerant" : "FPGALoopControlsINTEL", + "enumerant" : "FPGALoopControlsALTERA", + "aliases" : [ "FPGALoopControlsINTEL" ], "value" : 5888, - "extensions" : [ "SPV_INTEL_fpga_loop_controls" ], + "extensions" : [ "SPV_ALTERA_fpga_loop_controls", "SPV_INTEL_fpga_loop_controls" ], "version" : "None" }, { @@ -17146,27 +17566,31 @@ "version" : "None" }, { - "enumerant" : "FPGAMemoryAccessesINTEL", + "enumerant" : "FPGAMemoryAccessesALTERA", + "aliases" : [ "FPGAMemoryAccessesINTEL" ], "value" : 5898, - "extensions" : [ "SPV_INTEL_fpga_memory_accesses" ], + "extensions" : [ "SPV_ALTERA_fpga_memory_accesses", "SPV_INTEL_fpga_memory_accesses" ], "version" : "None" }, { - "enumerant" : "FPGAClusterAttributesINTEL", + "enumerant" : "FPGAClusterAttributesALTERA", + "aliases" : [ "FPGAClusterAttributesINTEL" ], "value" : 5904, - "extensions" : [ "SPV_INTEL_fpga_cluster_attributes" ], + "extensions" : [ "SPV_ALTERA_fpga_cluster_attributes", "SPV_INTEL_fpga_cluster_attributes" ], "version" : "None" }, { - "enumerant" : "LoopFuseINTEL", + "enumerant" : "LoopFuseALTERA", + "aliases" : [ "LoopFuseINTEL" ], "value" : 5906, - "extensions" : [ "SPV_INTEL_loop_fuse" ], + "extensions" : [ "SPV_ALTERA_loop_fuse", "SPV_INTEL_loop_fuse" ], "version" : "None" }, { - "enumerant" : "FPGADSPControlINTEL", + "enumerant" : "FPGADSPControlALTERA", + "aliases" : [ "FPGADSPControlINTEL" ], "value" : 5908, - "extensions" : [ "SPV_INTEL_fpga_dsp_control" ], + "extensions" : [ "SPV_ALTERA_fpga_dsp_control", "SPV_INTEL_fpga_dsp_control" ], "version" : "None" }, { @@ -17176,51 +17600,59 @@ "version" : "None" }, { - "enumerant" : "FPGAInvocationPipeliningAttributesINTEL", + "enumerant" : "FPGAInvocationPipeliningAttributesALTERA", + "aliases" : [ "FPGAInvocationPipeliningAttributesINTEL" ], "value" : 5916, - "extensions" : [ "SPV_INTEL_fpga_invocation_pipelining_attributes" ], + "extensions" : [ "SPV_ALTERA_fpga_invocation_pipelining_attributes", "SPV_INTEL_fpga_invocation_pipelining_attributes" ], "version" : "None" }, { - "enumerant" : "FPGABufferLocationINTEL", + "enumerant" : "FPGABufferLocationALTERA", + "aliases" : [ "FPGABufferLocationINTEL" ], "value" : 5920, - "extensions" : [ "SPV_INTEL_fpga_buffer_location" ], + "extensions" : [ "SPV_ALTERA_fpga_buffer_location", "SPV_INTEL_fpga_buffer_location" ], "version" : "None" }, { - "enumerant" : "ArbitraryPrecisionFixedPointINTEL", + "enumerant" : "ArbitraryPrecisionFixedPointALTERA", + "aliases" : [ "ArbitraryPrecisionFixedPointINTEL" ], "value" : 5922, - "extensions" : [ "SPV_INTEL_arbitrary_precision_fixed_point" ], + "extensions" : [ "SPV_ALTERA_arbitrary_precision_fixed_point", "SPV_INTEL_arbitrary_precision_fixed_point" ], "version" : "None" }, { - "enumerant" : "USMStorageClassesINTEL", + "enumerant" : "USMStorageClassesALTERA", + "aliases" : [ "USMStorageClassesINTEL" ], "value" : 5935, - "extensions" : [ "SPV_INTEL_usm_storage_classes" ], + "extensions" : [ "SPV_ALTERA_usm_storage_classes", "SPV_INTEL_usm_storage_classes" ], "version" : "None" }, { - "enumerant" : "RuntimeAlignedAttributeINTEL", + "enumerant" : "RuntimeAlignedAttributeALTERA", + "aliases" : [ "RuntimeAlignedAttributeINTEL" ], "value" : 5939, - "extensions" : [ "SPV_INTEL_runtime_aligned" ], + "extensions" : [ "SPV_ALTERA_runtime_aligned", "SPV_INTEL_runtime_aligned" ], "version" : "None" }, { - "enumerant" : "IOPipesINTEL", + "enumerant" : "IOPipesALTERA", + "aliases" : [ "IOPipesINTEL" ], "value" : 5943, - "extensions" : [ "SPV_INTEL_io_pipes" ], + "extensions" : [ "SPV_ALTERA_io_pipes", "SPV_INTEL_io_pipes" ], "version" : "None" }, { - "enumerant" : "BlockingPipesINTEL", + "enumerant" : "BlockingPipesALTERA", + "aliases" : [ "BlockingPipesINTEL" ], "value" : 5945, - "extensions" : [ "SPV_INTEL_blocking_pipes" ], + "extensions" : [ "SPV_ALTERA_blocking_pipes", "SPV_INTEL_blocking_pipes" ], "version" : "None" }, { - "enumerant" : "FPGARegINTEL", + "enumerant" : "FPGARegALTERA", + "aliases" : [ "FPGARegINTEL" ], "value" : 5948, - "extensions" : [ "SPV_INTEL_fpga_reg" ], + "extensions" : [ "SPV_ALTERA_fpga_reg", "SPV_INTEL_fpga_reg" ], "version" : "None" }, { @@ -17289,6 +17721,12 @@ "extensions" : [ "SPV_KHR_float_controls2" ], "version" : "None" }, + { + "enumerant" : "FMAKHR", + "value" : 6030, + "extensions" : [ "SPV_KHR_fma" ], + "version" : "None" + }, { "enumerant" : "AtomicFloat32AddEXT", "value" : 6033, @@ -17345,10 +17783,11 @@ "version" : "None" }, { - "enumerant" : "FPGAClusterAttributesV2INTEL", + "enumerant" : "FPGAClusterAttributesV2ALTERA", + "aliases" : [ "FPGAClusterAttributesV2INTEL" ], "value" : 6150, - "capabilities" : [ "FPGAClusterAttributesINTEL" ], - "extensions" : [ "SPV_INTEL_fpga_cluster_attributes" ], + "capabilities" : [ "FPGAClusterAttributesALTERA" ], + "extensions" : [ "SPV_ALTERA_fpga_cluster_attributes", "SPV_INTEL_fpga_cluster_attributes" ], "version" : "None" }, { @@ -17359,9 +17798,10 @@ "version" : "None" }, { - "enumerant" : "TaskSequenceINTEL", + "enumerant" : "TaskSequenceALTERA", + "aliases" : [ "TaskSequenceINTEL" ], "value" : 6162, - "extensions" : [ "SPV_INTEL_task_sequence" ], + "extensions" : [ "SPV_ALTERA_task_sequence", "SPV_INTEL_task_sequence" ], "version" : "None" }, { @@ -17371,15 +17811,17 @@ "version" : "None" }, { - "enumerant" : "FPGALatencyControlINTEL", + "enumerant" : "FPGALatencyControlALTERA", + "aliases" : [ "FPGALatencyControlINTEL" ], "value" : 6171, - "extensions" : [ "SPV_INTEL_fpga_latency_control" ], + "extensions" : [ "SPV_ALTERA_fpga_latency_control", "SPV_INTEL_fpga_latency_control" ], "version" : "None" }, { - "enumerant" : "FPGAArgumentInterfacesINTEL", + "enumerant" : "FPGAArgumentInterfacesALTERA", + "aliases" : [ "FPGAArgumentInterfacesINTEL" ], "value" : 6174, - "extensions" : [ "SPV_INTEL_fpga_argument_interfaces" ], + "extensions" : [ "SPV_ALTERA_fpga_argument_interfaces", "SPV_INTEL_fpga_argument_interfaces" ], "version" : "None" }, { @@ -17389,9 +17831,10 @@ "version" : "None" }, { - "enumerant" : "GlobalVariableFPGADecorationsINTEL", + "enumerant" : "GlobalVariableFPGADecorationsALTERA", + "aliases" : [ "GlobalVariableFPGADecorationsINTEL" ], "value" : 6189, - "extensions": [ "SPV_INTEL_global_variable_fpga_decorations" ], + "extensions" : [ "SPV_ALTERA_global_variable_fpga_decorations", "SPV_INTEL_global_variable_fpga_decorations" ], "version" : "None" }, { @@ -17432,6 +17875,28 @@ "extensions" : [ "SPV_INTEL_ternary_bitwise_function"], "version" : "None" }, + { + "enumerant" : "UntypedVariableLengthArrayINTEL", + "value" : 6243, + "capabilities" : [ "VariableLengthArrayINTEL", "UntypedPointersKHR" ], + "extensions" : [ "SPV_INTEL_variable_length_array" ], + "version" : "None" + }, + { + "enumerant" : "SpecConditionalINTEL", + "value" : 6245, + "extensions" : [ "SPV_INTEL_function_variants" ], + "provisional" : true, + "version": "None" + }, + { + "enumerant" : "FunctionVariantsINTEL", + "value" : 6246, + "capabilities" : [ "SpecConditionalINTEL" ], + "extensions" : [ "SPV_INTEL_function_variants" ], + "provisional" : true, + "version": "None" + }, { "enumerant" : "GroupUniformArithmeticKHR", "value" : 6400, @@ -17461,6 +17926,13 @@ "value" : 6460, "extensions" : [ "SPV_INTEL_maximum_registers" ], "version" : "None" + }, + { + "enumerant" : "BindlessImagesINTEL", + "value" : 6528, + "extensions" : [ "SPV_INTEL_bindless_images" ], + "provisional" : true, + "version" : "None" } ] }, @@ -17706,15 +18178,17 @@ "kind" : "InitializationModeQualifier", "enumerants" : [ { - "enumerant" : "InitOnDeviceReprogramINTEL", + "enumerant" : "InitOnDeviceReprogramALTERA", + "aliases" : [ "InitOnDeviceReprogramINTEL" ], "value" : 0, - "capabilities" : [ "GlobalVariableFPGADecorationsINTEL" ], + "capabilities" : [ "GlobalVariableFPGADecorationsALTERA" ], "version" : "None" }, { - "enumerant" : "InitOnDeviceResetINTEL", + "enumerant" : "InitOnDeviceResetALTERA", + "aliases" : [ "InitOnDeviceResetINTEL" ], "value" : 1, - "capabilities" : [ "GlobalVariableFPGADecorationsINTEL" ], + "capabilities" : [ "GlobalVariableFPGADecorationsALTERA" ], "version" : "None" } ] @@ -17887,6 +18361,18 @@ "value" : 0, "capabilities" : [ "BFloat16TypeKHR" ], "version" : "None" + }, + { + "enumerant" : "Float8E4M3EXT", + "value" : 4214, + "capabilities" : [ "Float8EXT" ], + "version" : "None" + }, + { + "enumerant" : "Float8E5M2EXT", + "value" : 4215, + "capabilities" : [ "Float8EXT" ], + "version" : "None" } ] }, diff --git a/renderdoc/driver/shaders/spirv/spirv_debug.cpp b/renderdoc/driver/shaders/spirv/spirv_debug.cpp index 328c3540a..6bd7653f0 100644 --- a/renderdoc/driver/shaders/spirv/spirv_debug.cpp +++ b/renderdoc/driver/shaders/spirv/spirv_debug.cpp @@ -3022,7 +3022,7 @@ void ThreadState::StepNext(bool useDebugState, const uint32_t steps, OpGroupNonUniformBroadcast group(it); RDCASSERT(uintComp(GetSrc(group.execution), 0) == (uint32_t)Scope::Subgroup); value = group.value; - lane = firstLaneInSub + uintComp(GetSrc(group.id), 0); + lane = firstLaneInSub + uintComp(GetSrc(group.invocationId), 0); } else if(opdata.op == Op::GroupNonUniformQuadBroadcast) { @@ -3086,7 +3086,7 @@ void ThreadState::StepNext(bool useDebugState, const uint32_t steps, OpGroupNonUniformShuffle group(it); RDCASSERT(uintComp(GetSrc(group.execution), 0) == (uint32_t)Scope::Subgroup); value = group.value; - lane = firstLaneInSub + uintComp(GetSrc(group.id), 0); + lane = firstLaneInSub + uintComp(GetSrc(group.invocationId), 0); } else if(opdata.op == Op::GroupNonUniformShuffleXor || opdata.op == Op::GroupNonUniformShuffleUp || @@ -4995,7 +4995,6 @@ void ThreadState::StepNext(bool useDebugState, const uint32_t steps, case Op::HitObjectIsMissNV: case Op::ReorderThreadWithHitObjectNV: case Op::ReorderThreadWithHintNV: - case Op::TypeHitObjectNV: case Op::ColorAttachmentReadEXT: case Op::DepthAttachmentReadEXT: case Op::StencilAttachmentReadEXT: @@ -5006,7 +5005,6 @@ void ThreadState::StepNext(bool useDebugState, const uint32_t steps, case Op::RayQueryGetIntersectionTriangleVertexPositionsKHR: case Op::ConvertBF16ToFINTEL: case Op::ConvertFToBF16INTEL: - case Op::TypeCooperativeMatrixKHR: case Op::CooperativeMatrixLoadKHR: case Op::CooperativeMatrixStoreKHR: case Op::CooperativeMatrixMulAddKHR: @@ -5027,6 +5025,65 @@ void ThreadState::StepNext(bool useDebugState, const uint32_t steps, case Op::ConstantCompositeReplicateEXT: case Op::SpecConstantCompositeReplicateEXT: case Op::RawAccessChainNV: + case Op::CreateTensorLayoutNV: + case Op::CreateTensorViewNV: + case Op::TensorViewSetClipNV: + case Op::TensorViewSetDimensionNV: + case Op::TensorViewSetStrideNV: + case Op::TensorLayoutSetDimensionNV: + case Op::TensorLayoutSetBlockSizeNV: + case Op::TensorLayoutSetClampValueNV: + case Op::TensorLayoutSetStrideNV: + case Op::TensorLayoutSliceNV: + case Op::RayQueryGetIntersectionClusterIdNV: + case Op::RayQueryIsSphereHitNV: + case Op::RayQueryIsLSSHitNV: + case Op::RayQueryGetIntersectionLSSHitValueNV: + case Op::RayQueryGetIntersectionLSSPositionsNV: + case Op::RayQueryGetIntersectionLSSRadiiNV: + case Op::RayQueryGetIntersectionSpherePositionNV: + case Op::RayQueryGetIntersectionSphereRadiusNV: + case Op::HitObjectIsLSSHitNV: + case Op::HitObjectIsSphereHitNV: + case Op::HitObjectGetLSSPositionsNV: + case Op::HitObjectGetLSSRadiiNV: + case Op::HitObjectGetSpherePositionNV: + case Op::HitObjectGetSphereRadiusNV: + case Op::HitObjectGetClusterIdNV: + case Op::CooperativeMatrixConvertNV: + case Op::CooperativeMatrixReduceNV: + case Op::CooperativeMatrixLoadTensorNV: + case Op::CooperativeMatrixStoreTensorNV: + case Op::CooperativeMatrixPerElementOpNV: + case Op::CooperativeMatrixTransposeNV: + case Op::CooperativeVectorLoadNV: + case Op::CooperativeVectorStoreNV: + case Op::CooperativeVectorMatrixMulAddNV: + case Op::CooperativeVectorMatrixMulNV: + case Op::CooperativeVectorOuterProductAccumulateNV: + case Op::CooperativeVectorReduceSumAccumulateNV: + case Op::GraphARM: + case Op::GraphConstantARM: + case Op::GraphEntryPointARM: + case Op::GraphInputARM: + case Op::GraphSetOutputARM: + case Op::GraphEndARM: + case Op::ArithmeticFenceEXT: + case Op::EnqueueNodePayloadsAMDX: + case Op::IsNodePayloadValidAMDX: + case Op::UntypedGroupAsyncCopyKHR: + case Op::UntypedVariableKHR: + case Op::UntypedAccessChainKHR: + case Op::UntypedInBoundsAccessChainKHR: + case Op::UntypedInBoundsPtrAccessChainKHR: + case Op::UntypedPtrAccessChainKHR: + case Op::UntypedArrayLengthKHR: + case Op::UntypedPrefetchKHR: + case Op::BitCastArrayQCOM: + case Op::CompositeConstructCoopMatQCOM: + case Op::CompositeExtractCoopMatQCOM: + case Op::ExtractSubArrayQCOM: + case Op::FmaKHR: { RDCERR("Unsupported extension opcode used %s", ToStr(opdata.op).c_str()); @@ -5093,19 +5150,15 @@ void ThreadState::StepNext(bool useDebugState, const uint32_t steps, case Op::ModuleProcessed: case Op::ExecutionModeId: case Op::TypeUntypedPointerKHR: - case Op::UntypedVariableKHR: - case Op::UntypedAccessChainKHR: - case Op::UntypedInBoundsAccessChainKHR: - case Op::UntypedInBoundsPtrAccessChainKHR: - case Op::UntypedPtrAccessChainKHR: - case Op::UntypedArrayLengthKHR: - case Op::UntypedPrefetchKHR: case Op::TypeNodePayloadArrayAMDX: case Op::ConstantStringAMDX: case Op::SpecConstantStringAMDX: case Op::TypeCooperativeVectorNV: case Op::TypeTensorLayoutNV: case Op::TypeTensorViewNV: + case Op::TypeGraphARM: + case Op::TypeHitObjectNV: + case Op::TypeCooperativeMatrixKHR: { RDCERR("Encountered unexpected global SPIR-V operation %s", ToStr(opdata.op).c_str()); break; @@ -5171,69 +5224,35 @@ void ThreadState::StepNext(bool useDebugState, const uint32_t steps, case Op::TypePipeStorage: case Op::ConstantPipeStorage: case Op::CreatePipeFromPipeStorage: - case Op::FPGARegINTEL: - case Op::ReadPipeBlockingINTEL: - case Op::WritePipeBlockingINTEL: case Op::ControlBarrierArriveINTEL: case Op::ControlBarrierWaitINTEL: - case Op::ArithmeticFenceEXT: case Op::SubgroupMatrixMultiplyAccumulateINTEL: - case Op::EnqueueNodePayloadsAMDX: - case Op::IsNodePayloadValidAMDX: case Op::SubgroupBlockPrefetchINTEL: case Op::Subgroup2DBlockLoadINTEL: case Op::Subgroup2DBlockLoadTransformINTEL: case Op::Subgroup2DBlockLoadTransposeINTEL: case Op::Subgroup2DBlockPrefetchINTEL: case Op::Subgroup2DBlockStoreINTEL: - case Op::CreateTensorLayoutNV: - case Op::CreateTensorViewNV: - case Op::TensorViewSetClipNV: - case Op::TensorViewSetDimensionNV: - case Op::TensorViewSetStrideNV: - case Op::TensorLayoutSetDimensionNV: - case Op::TensorLayoutSetBlockSizeNV: - case Op::TensorLayoutSetClampValueNV: - case Op::TensorLayoutSetStrideNV: - case Op::TensorLayoutSliceNV: - case Op::RayQueryGetClusterIdNV: - case Op::RayQueryIsSphereHitNV: - case Op::RayQueryIsLSSHitNV: - case Op::RayQueryGetIntersectionLSSHitValueNV: - case Op::RayQueryGetIntersectionLSSPositionsNV: - case Op::RayQueryGetIntersectionLSSRadiiNV: - case Op::RayQueryGetIntersectionSpherePositionNV: - case Op::RayQueryGetIntersectionSphereRadiusNV: - case Op::HitObjectIsLSSHitNV: - case Op::HitObjectIsSphereHitNV: - case Op::HitObjectGetLSSPositionsNV: - case Op::HitObjectGetLSSRadiiNV: - case Op::HitObjectGetSpherePositionNV: - case Op::HitObjectGetSphereRadiusNV: - case Op::HitObjectGetClusterIdNV: - case Op::CooperativeMatrixConvertNV: - case Op::CooperativeMatrixReduceNV: - case Op::CooperativeMatrixLoadTensorNV: - case Op::CooperativeMatrixStoreTensorNV: - case Op::CooperativeMatrixPerElementOpNV: - case Op::CooperativeMatrixTransposeNV: - case Op::CooperativeVectorLoadNV: - case Op::CooperativeVectorStoreNV: - case Op::CooperativeVectorMatrixMulAddNV: - case Op::CooperativeVectorMatrixMulNV: - case Op::CooperativeVectorOuterProductAccumulateNV: - case Op::CooperativeVectorReduceSumAccumulateNV: case Op::TypeTensorARM: case Op::TensorReadARM: case Op::TensorWriteARM: case Op::TensorQuerySizeARM: - case Op::TaskSequenceAsyncINTEL: - case Op::TaskSequenceCreateINTEL: - case Op::TaskSequenceGetINTEL: - case Op::TaskSequenceReleaseINTEL: - case Op::TypeTaskSequenceINTEL: case Op::BitwiseFunctionINTEL: case Op::RoundFToTF32INTEL: + case Op::SaveMemoryINTEL: + case Op::RestoreMemoryINTEL: + case Op::VariableLengthArrayINTEL: + case Op::UntypedVariableLengthArrayINTEL: + case Op::ConditionalEntryPointINTEL: + case Op::ConditionalCapabilityINTEL: + case Op::ConditionalExtensionINTEL: + case Op::SpecConstantArchitectureINTEL: + case Op::SpecConstantTargetINTEL: + case Op::ConvertHandleToImageINTEL: + case Op::ConvertHandleToSampledImageINTEL: + case Op::ConvertHandleToSamplerINTEL: + case Op::SpecConstantCapabilitiesINTEL: + case Op::ConditionalCopyObjectINTEL: { // these are kernel only RDCERR("Encountered unexpected kernel SPIR-V operation %s", ToStr(opdata.op).c_str()); diff --git a/renderdoc/driver/shaders/spirv/spirv_debug_setup.cpp b/renderdoc/driver/shaders/spirv/spirv_debug_setup.cpp index a0febe2e5..8d52e3831 100644 --- a/renderdoc/driver/shaders/spirv/spirv_debug_setup.cpp +++ b/renderdoc/driver/shaders/spirv/spirv_debug_setup.cpp @@ -446,16 +446,9 @@ void Reflector::CheckDebuggable(bool &debuggable, rdcstr &debugStatus) const "SPV_KHR_16bit_storage", "SPV_KHR_8bit_storage", "SPV_KHR_bit_instructions", - // SPV_KHR_compute_shader_derivatives - // SPV_KHR_cooperative_matrix "SPV_KHR_device_group", "SPV_KHR_expect_assume", "SPV_KHR_float_controls", - // SPV_KHR_float_controls2 - // SPV_KHR_fragment_shader_barycentric - // SPV_KHR_fragment_shading_rate - // SPV_KHR_integer_dot_product - // SPV_KHR_linkonce_odr - kernel only "SPV_KHR_maximal_reconvergence", "SPV_KHR_multiview", "SPV_KHR_no_integer_wrap_decoration", @@ -463,10 +456,6 @@ void Reflector::CheckDebuggable(bool &debuggable, rdcstr &debugStatus) const "SPV_KHR_physical_storage_buffer", "SPV_KHR_post_depth_coverage", "SPV_KHR_quad_control", - // SPV_KHR_ray_cull_mask - // SPV_KHR_ray_query - // SPV_KHR_ray_tracing - // SPV_KHR_ray_tracing_position_fetch "SPV_KHR_relaxed_extended_instruction", "SPV_KHR_shader_atomic_counter_ops", "SPV_KHR_shader_ballot", @@ -477,34 +466,21 @@ void Reflector::CheckDebuggable(bool &debuggable, rdcstr &debugStatus) const "SPV_KHR_subgroup_uniform_control_flow", "SPV_KHR_subgroup_vote", "SPV_KHR_terminate_invocation", - // SPV_KHR_uniform_group_instructions - kernel? - // SPV_KHR_untyped_pointers - kernel - // SPV_KHR_variable_pointers "SPV_KHR_vulkan_memory_model", - // SPV_KHR_workgroup_memory_explicit_layout // EXT extensions - // SPV_EXT_arithmetic_fence - kernel? "SPV_EXT_demote_to_helper_invocation", "SPV_EXT_descriptor_indexing", "SPV_EXT_fragment_fully_covered", "SPV_EXT_fragment_invocation_density", - // SPV_EXT_fragment_shader_interlock - // SPV_EXT_image_raw10_raw12 - kernel? "SPV_EXT_mesh_shader", - // SPV_EXT_opacity_micromap - // SPV_EXT_optnone - kernel? "SPV_EXT_physical_storage_buffer", - // SPV_EXT_relaxed_printf_string_address_space - kernel - // SPV_EXT_replicated_composites "SPV_EXT_shader_atomic_float_add", - // SPV_EXT_shader_atomic_float_min_max - // SPV_EXT_shader_atomic_float16_add + "SPV_EXT_shader_atomic_float_min_max", + "SPV_EXT_shader_atomic_float16_add", "SPV_EXT_shader_image_int64", "SPV_EXT_shader_stencil_export", - // SPV_EXT_shader_tile_image "SPV_EXT_shader_viewport_index_layer", - // SPV_EXT_ycbcr_attachments // vendor extensions "SPV_GOOGLE_decorate_string", @@ -629,21 +605,17 @@ void Reflector::CheckDebuggable(bool &debuggable, rdcstr &debugStatus) const case Capability::PhysicalStorageBufferAddresses: case Capability::MeshShadingEXT: case Capability::QuadControlKHR: - { - supported = true; - break; - } case Capability::GroupNonUniform: - case Capability::GroupNonUniformVote: + case Capability::GroupNonUniformArithmetic: case Capability::GroupNonUniformBallot: - case Capability::GroupNonUniformShuffle: - case Capability::GroupNonUniformShuffleRelative: case Capability::GroupNonUniformClustered: case Capability::GroupNonUniformQuad: + case Capability::GroupNonUniformRotateKHR: + case Capability::GroupNonUniformShuffle: + case Capability::GroupNonUniformShuffleRelative: + case Capability::GroupNonUniformVote: case Capability::SubgroupBallotKHR: case Capability::SubgroupVoteKHR: - case Capability::GroupNonUniformRotateKHR: - case Capability::GroupNonUniformArithmetic: { supported = true; break; @@ -651,48 +623,31 @@ void Reflector::CheckDebuggable(bool &debuggable, rdcstr &debugStatus) const // we plan to support these but needs additional testing/proving - // MSAA custom interpolation + // SPIR-V 1.0 MSAA custom interpolation case Capability::InterpolationFunction: + { + supported = false; + break; + } - // variable pointers - case Capability::VariablePointersStorageBuffer: - case Capability::VariablePointers: + // SPIR-V 1.0 Sparse Operations + case Capability::SparseResidency: + { + supported = false; + break; + } - // float controls + // SPIR-V 1.4 / SPV_KHR_float_controls case Capability::DenormPreserve: case Capability::DenormFlushToZero: case Capability::RoundingModeRTE: case Capability::RoundingModeRTZ: - - case Capability::FloatControls2: - - // group instructions - - // workgroup layout: - case Capability::WorkgroupMemoryExplicitLayout16BitAccessKHR: - case Capability::WorkgroupMemoryExplicitLayout8BitAccessKHR: - case Capability::WorkgroupMemoryExplicitLayoutKHR: - - // sparse operations - case Capability::SparseResidency: - - // fragment interlock - case Capability::FragmentShaderSampleInterlockEXT: - case Capability::FragmentShaderShadingRateInterlockEXT: - case Capability::FragmentShaderPixelInterlockEXT: { supported = false; break; } - // fragment shading rate - case Capability::FragmentShadingRateKHR: - { - supported = false; - break; - } - - // integer dot product + // SPIR-V 1.6 / SPV_KHR_integer_dot_product case Capability::DotProduct: case Capability::DotProductInput4x8Bit: case Capability::DotProductInput4x8BitPacked: @@ -702,29 +657,15 @@ void Reflector::CheckDebuggable(bool &debuggable, rdcstr &debugStatus) const break; } - // raytracing - case Capability::RayQueryKHR: - case Capability::RayTraversalPrimitiveCullingKHR: - case Capability::RayTracingKHR: - case Capability::RayCullMaskKHR: - case Capability::RayTracingOpacityMicromapEXT: - case Capability::RayTracingNV: - case Capability::ShaderInvocationReorderNV: - case Capability::RayQueryPositionFetchKHR: - case Capability::RayTracingPositionFetchKHR: + // SPV_KHR_bfloat16 + case Capability::BFloat16TypeKHR: + case Capability::BFloat16DotProductKHR: { supported = false; break; } - // barycentric - case Capability::FragmentBarycentricKHR: - { - supported = false; - break; - } - - // compute shader derivatives + // SPV_KHR_compute_shader_derivatives case Capability::ComputeDerivativeGroupQuadsKHR: case Capability::ComputeDerivativeGroupLinearKHR: { @@ -732,17 +673,104 @@ void Reflector::CheckDebuggable(bool &debuggable, rdcstr &debugStatus) const break; } - // untyped pointers + // SPV_KHR_float_controls2 + case Capability::FloatControls2: + { + supported = false; + break; + } + + // SPV_KHR_fma + case Capability::FMAKHR: + { + supported = false; + break; + } + + // SPV_KHR_fragment_shader_barycentric + case Capability::FragmentBarycentricKHR: + { + supported = false; + break; + } + + // SPV_KHR_fragment_shading_rate + case Capability::FragmentShadingRateKHR: + { + supported = false; + break; + } + + // SPV_KHR_untyped_pointers case Capability::UntypedPointersKHR: { supported = false; break; } - // bfloat16 - case Capability::BFloat16TypeKHR: - case Capability::BFloat16DotProductKHR: - case Capability::BFloat16CooperativeMatrixKHR: + // SPV_KHR_variable_pointers + case Capability::VariablePointersStorageBuffer: + case Capability::VariablePointers: + { + supported = false; + break; + } + + // SPV_KHR_workgroup_memory_explicit_layout + case Capability::WorkgroupMemoryExplicitLayout16BitAccessKHR: + case Capability::WorkgroupMemoryExplicitLayout8BitAccessKHR: + case Capability::WorkgroupMemoryExplicitLayoutKHR: + { + supported = false; + break; + } + + // Ray tracing + case Capability::RayCullMaskKHR: + case Capability::RayQueryKHR: + case Capability::RayQueryPositionFetchKHR: + case Capability::RayTracingKHR: + case Capability::RayTracingPositionFetchKHR: + case Capability::RayTraversalPrimitiveCullingKHR: + case Capability::RayTracingOpacityMicromapEXT: + { + supported = false; + break; + } + + // SPV_EXT_float8 + case Capability::Float8EXT: + { + supported = false; + break; + } + + // SPV_EXT_fragment_shader_interlock + case Capability::FragmentShaderSampleInterlockEXT: + case Capability::FragmentShaderShadingRateInterlockEXT: + case Capability::FragmentShaderPixelInterlockEXT: + { + supported = false; + break; + } + + case Capability::ReplicatedCompositesEXT: + { + supported = false; + break; + } + + // SPV_EXT_shader_64bit_indexing + case Capability::Shader64BitIndexingEXT: + { + supported = false; + break; + } + + // SPV_EXT_shader_tile_image + case Capability::TileImageColorReadAccessEXT: + case Capability::TileImageDepthReadAccessEXT: + case Capability::TileImageStencilReadAccessEXT: { supported = false; break; @@ -789,12 +817,12 @@ void Reflector::CheckDebuggable(bool &debuggable, rdcstr &debugStatus) const case Capability::FunctionPointersINTEL: case Capability::IndirectReferencesINTEL: case Capability::FPGAKernelAttributesINTEL: - case Capability::FPGALoopControlsINTEL: - case Capability::FPGAMemoryAttributesINTEL: - case Capability::FPGARegINTEL: + case Capability::FPGALoopControlsALTERA: + case Capability::FPGAMemoryAttributesALTERA: + case Capability::FPGARegALTERA: case Capability::UnstructuredLoopControlsINTEL: case Capability::KernelAttributesINTEL: - case Capability::BlockingPipesINTEL: + case Capability::BlockingPipesALTERA: case Capability::RayTracingMotionBlurNV: case Capability::RoundToInfinityINTEL: case Capability::FloatingPointModeINTEL: @@ -804,15 +832,15 @@ void Reflector::CheckDebuggable(bool &debuggable, rdcstr &debugStatus) const case Capability::VariableLengthArrayINTEL: case Capability::FunctionFloatControlINTEL: case Capability::FPFastMathModeINTEL: - case Capability::ArbitraryPrecisionFixedPointINTEL: - case Capability::ArbitraryPrecisionFloatingPointINTEL: - case Capability::ArbitraryPrecisionIntegersINTEL: - case Capability::FPGAMemoryAccessesINTEL: - case Capability::FPGAClusterAttributesINTEL: - case Capability::LoopFuseINTEL: - case Capability::FPGABufferLocationINTEL: - case Capability::USMStorageClassesINTEL: - case Capability::IOPipesINTEL: + case Capability::ArbitraryPrecisionFixedPointALTERA: + case Capability::ArbitraryPrecisionFloatingPointALTERA: + case Capability::ArbitraryPrecisionIntegersALTERA: + case Capability::FPGAMemoryAccessesALTERA: + case Capability::FPGAClusterAttributesALTERA: + case Capability::LoopFuseALTERA: + case Capability::FPGABufferLocationALTERA: + case Capability::USMStorageClassesALTERA: + case Capability::IOPipesALTERA: case Capability::LongCompositesINTEL: case Capability::DebugInfoModuleINTEL: case Capability::BindlessTextureNV: @@ -820,19 +848,16 @@ void Reflector::CheckDebuggable(bool &debuggable, rdcstr &debugStatus) const case Capability::SplitBarrierINTEL: case Capability::GroupUniformArithmeticKHR: case Capability::CoreBuiltinsARM: - case Capability::FPGADSPControlINTEL: - case Capability::FPGAInvocationPipeliningAttributesINTEL: - case Capability::RuntimeAlignedAttributeINTEL: - case Capability::TileImageColorReadAccessEXT: - case Capability::TileImageDepthReadAccessEXT: - case Capability::TileImageStencilReadAccessEXT: + case Capability::FPGADSPControlALTERA: + case Capability::FPGAInvocationPipeliningAttributesALTERA: + case Capability::RuntimeAlignedAttributeALTERA: case Capability::TextureSampleWeightedQCOM: case Capability::TextureBoxFilterQCOM: case Capability::TextureBlockMatchQCOM: case Capability::BFloat16ConversionINTEL: case Capability::FPGAKernelAttributesv2INTEL: - case Capability::FPGALatencyControlINTEL: - case Capability::FPGAArgumentInterfacesINTEL: + case Capability::FPGALatencyControlALTERA: + case Capability::FPGAArgumentInterfacesALTERA: case Capability::TextureBlockMatch2QCOM: case Capability::ShaderEnqueueAMDX: case Capability::DisplacementMicromapNV: @@ -846,9 +871,9 @@ void Reflector::CheckDebuggable(bool &debuggable, rdcstr &debugStatus) const case Capability::CooperativeMatrixPerElementOperationsNV: case Capability::CooperativeMatrixTensorAddressingNV: case Capability::CooperativeMatrixBlockLoadsNV: - case Capability::FPGAClusterAttributesV2INTEL: + case Capability::FPGAClusterAttributesV2ALTERA: case Capability::FPMaxErrorINTEL: - case Capability::GlobalVariableFPGADecorationsINTEL: + case Capability::GlobalVariableFPGADecorationsALTERA: case Capability::MaskedGatherScatterINTEL: case Capability::CacheControlsINTEL: case Capability::RegisterLimitsINTEL: @@ -860,7 +885,6 @@ void Reflector::CheckDebuggable(bool &debuggable, rdcstr &debugStatus) const case Capability::SubgroupMatrixMultiplyAccumulateINTEL: case Capability::CooperativeMatrixLayoutsARM: case Capability::RawAccessChainsNV: - case Capability::ReplicatedCompositesEXT: case Capability::RayTracingSpheresGeometryNV: case Capability::RayTracingLinearSweptSpheresGeometryNV: case Capability::RayTracingClusterAccelerationStructureNV: @@ -873,9 +897,19 @@ void Reflector::CheckDebuggable(bool &debuggable, rdcstr &debugStatus) const case Capability::TileShadingQCOM: case Capability::Int4TypeINTEL: case Capability::Int4CooperativeMatrixINTEL: - case Capability::TaskSequenceINTEL: + case Capability::TaskSequenceALTERA: case Capability::TernaryBitwiseFunctionINTEL: case Capability::TensorFloat32RoundingINTEL: + case Capability::GraphARM: + case Capability::BFloat16CooperativeMatrixKHR: + case Capability::Float8CooperativeMatrixEXT: + case Capability::CooperativeMatrixConversionQCOM: + case Capability::UntypedVariableLengthArrayINTEL: + case Capability::SpecConditionalINTEL: + case Capability::FunctionVariantsINTEL: + case Capability::BindlessImagesINTEL: + case Capability::RayTracingNV: + case Capability::ShaderInvocationReorderNV: case Capability::Max: case Capability::Invalid: { diff --git a/renderdoc/driver/shaders/spirv/spirv_gen.cpp b/renderdoc/driver/shaders/spirv/spirv_gen.cpp index bf8c29404..bed88d60b 100644 --- a/renderdoc/driver/shaders/spirv/spirv_gen.cpp +++ b/renderdoc/driver/shaders/spirv/spirv_gen.cpp @@ -25,29 +25,13 @@ /****************************************************************************** * Generated from Khronos SPIR-V machine-readable JSON grammar. * - * Copyright (c) 2014-2024 The Khronos Group Inc. + * Copyright: 2014-2024 The Khronos Group Inc. + * License: MIT * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and/or associated documentation files (the "Materials"), - * to deal in the Materials without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Materials, and to permit persons to whom the - * Materials are furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Materials. - * - * MODIFICATIONS TO THIS FILE MAY MEAN IT NO LONGER ACCURATELY REFLECTS KHRONOS - * STANDARDS. THE UNMODIFIED, NORMATIVE VERSIONS OF KHRONOS SPECIFICATIONS AND - * HEADER INFORMATION ARE LOCATED AT https://www.khronos.org/registry/ - * - * THE MATERIALS ARE PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS - * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM,OUT OF OR IN CONNECTION WITH THE MATERIALS OR THE USE OR OTHER DEALINGS - * IN THE MATERIALS. + * MODIFICATIONS TO THIS FILE MAY MEAN IT NO LONGER ACCURATELY REFLECTS + * KHRONOS STANDARDS. THE UNMODIFIED, NORMATIVE VERSIONS OF KHRONOS + * SPECIFICATIONS AND HEADER INFORMATION ARE LOCATED AT + * https://www.khronos.org/registry/ ******************************************************************************/ // This file is autogenerated with gen_spirv_code.py - any changes will be overwritten next time @@ -137,16 +121,16 @@ rdcstr DoStringise(const rdcspv::LoopControl &el) STRINGISE_BITFIELD_CLASS_BIT(IterationMultiple); STRINGISE_BITFIELD_CLASS_BIT(PeelCount); STRINGISE_BITFIELD_CLASS_BIT(PartialCount); - STRINGISE_BITFIELD_CLASS_BIT(InitiationIntervalINTEL); - STRINGISE_BITFIELD_CLASS_BIT(MaxConcurrencyINTEL); - STRINGISE_BITFIELD_CLASS_BIT(DependencyArrayINTEL); - STRINGISE_BITFIELD_CLASS_BIT(PipelineEnableINTEL); - STRINGISE_BITFIELD_CLASS_BIT(LoopCoalesceINTEL); - STRINGISE_BITFIELD_CLASS_BIT(MaxInterleavingINTEL); - STRINGISE_BITFIELD_CLASS_BIT(SpeculatedIterationsINTEL); - STRINGISE_BITFIELD_CLASS_BIT(NoFusionINTEL); - STRINGISE_BITFIELD_CLASS_BIT(LoopCountINTEL); - STRINGISE_BITFIELD_CLASS_BIT(MaxReinvocationDelayINTEL); + STRINGISE_BITFIELD_CLASS_BIT(InitiationIntervalALTERA); + STRINGISE_BITFIELD_CLASS_BIT(MaxConcurrencyALTERA); + STRINGISE_BITFIELD_CLASS_BIT(DependencyArrayALTERA); + STRINGISE_BITFIELD_CLASS_BIT(PipelineEnableALTERA); + STRINGISE_BITFIELD_CLASS_BIT(LoopCoalesceALTERA); + STRINGISE_BITFIELD_CLASS_BIT(MaxInterleavingALTERA); + STRINGISE_BITFIELD_CLASS_BIT(SpeculatedIterationsALTERA); + STRINGISE_BITFIELD_CLASS_BIT(NoFusionALTERA); + STRINGISE_BITFIELD_CLASS_BIT(LoopCountALTERA); + STRINGISE_BITFIELD_CLASS_BIT(MaxReinvocationDelayALTERA); } END_BITFIELD_STRINGISE(); } @@ -426,6 +410,7 @@ rdcstr DoStringise(const rdcspv::ExecutionMode &el) STRINGISE_ENUM_CLASS(SampleInterlockUnorderedEXT); STRINGISE_ENUM_CLASS(ShadingRateInterlockOrderedEXT); STRINGISE_ENUM_CLASS(ShadingRateInterlockUnorderedEXT); + STRINGISE_ENUM_CLASS(Shader64BitIndexingEXT); STRINGISE_ENUM_CLASS(SharedLocalMemorySizeINTEL); STRINGISE_ENUM_CLASS(RoundingModeRTPINTEL); STRINGISE_ENUM_CLASS(RoundingModeRTNINTEL); @@ -479,8 +464,8 @@ rdcstr DoStringise(const rdcspv::StorageClass &el) STRINGISE_ENUM_CLASS(HitObjectAttributeNV); STRINGISE_ENUM_CLASS(TaskPayloadWorkgroupEXT); STRINGISE_ENUM_CLASS(CodeSectionINTEL); - STRINGISE_ENUM_CLASS(DeviceOnlyINTEL); - STRINGISE_ENUM_CLASS(HostOnlyINTEL); + STRINGISE_ENUM_CLASS(DeviceOnlyALTERA); + STRINGISE_ENUM_CLASS(HostOnlyALTERA); } END_ENUM_STRINGISE(); } @@ -757,7 +742,7 @@ rdcstr DoStringise(const rdcspv::FunctionParameterAttribute &el) STRINGISE_ENUM_CLASS(NoCapture); STRINGISE_ENUM_CLASS(NoWrite); STRINGISE_ENUM_CLASS(NoReadWrite); - STRINGISE_ENUM_CLASS(RuntimeAlignedINTEL); + STRINGISE_ENUM_CLASS(RuntimeAlignedALTERA); } END_ENUM_STRINGISE(); } @@ -814,6 +799,7 @@ rdcstr DoStringise(const rdcspv::Decoration &el) STRINGISE_ENUM_CLASS(MaxByteOffset); STRINGISE_ENUM_CLASS(AlignmentId); STRINGISE_ENUM_CLASS(MaxByteOffsetId); + STRINGISE_ENUM_CLASS(SaturatedToLargestFloat8NormalConversionEXT); STRINGISE_ENUM_CLASS(NoSignedWrap); STRINGISE_ENUM_CLASS(NoUnsignedWrap); STRINGISE_ENUM_CLASS(WeightTextureQCOM); @@ -858,55 +844,56 @@ rdcstr DoStringise(const rdcspv::Decoration &el) STRINGISE_ENUM_CLASS(UserTypeGOOGLE); STRINGISE_ENUM_CLASS(FunctionRoundingModeINTEL); STRINGISE_ENUM_CLASS(FunctionDenormModeINTEL); - STRINGISE_ENUM_CLASS(RegisterINTEL); - STRINGISE_ENUM_CLASS(MemoryINTEL); - STRINGISE_ENUM_CLASS(NumbanksINTEL); - STRINGISE_ENUM_CLASS(BankwidthINTEL); - STRINGISE_ENUM_CLASS(MaxPrivateCopiesINTEL); - STRINGISE_ENUM_CLASS(SinglepumpINTEL); - STRINGISE_ENUM_CLASS(DoublepumpINTEL); - STRINGISE_ENUM_CLASS(MaxReplicatesINTEL); - STRINGISE_ENUM_CLASS(SimpleDualPortINTEL); - STRINGISE_ENUM_CLASS(MergeINTEL); - STRINGISE_ENUM_CLASS(BankBitsINTEL); - STRINGISE_ENUM_CLASS(ForcePow2DepthINTEL); - STRINGISE_ENUM_CLASS(StridesizeINTEL); - STRINGISE_ENUM_CLASS(WordsizeINTEL); - STRINGISE_ENUM_CLASS(TrueDualPortINTEL); - STRINGISE_ENUM_CLASS(BurstCoalesceINTEL); - STRINGISE_ENUM_CLASS(CacheSizeINTEL); - STRINGISE_ENUM_CLASS(DontStaticallyCoalesceINTEL); - STRINGISE_ENUM_CLASS(PrefetchINTEL); - STRINGISE_ENUM_CLASS(StallEnableINTEL); - STRINGISE_ENUM_CLASS(FuseLoopsInFunctionINTEL); - STRINGISE_ENUM_CLASS(MathOpDSPModeINTEL); + STRINGISE_ENUM_CLASS(RegisterALTERA); + STRINGISE_ENUM_CLASS(MemoryALTERA); + STRINGISE_ENUM_CLASS(NumbanksALTERA); + STRINGISE_ENUM_CLASS(BankwidthALTERA); + STRINGISE_ENUM_CLASS(MaxPrivateCopiesALTERA); + STRINGISE_ENUM_CLASS(SinglepumpALTERA); + STRINGISE_ENUM_CLASS(DoublepumpALTERA); + STRINGISE_ENUM_CLASS(MaxReplicatesALTERA); + STRINGISE_ENUM_CLASS(SimpleDualPortALTERA); + STRINGISE_ENUM_CLASS(MergeALTERA); + STRINGISE_ENUM_CLASS(BankBitsALTERA); + STRINGISE_ENUM_CLASS(ForcePow2DepthALTERA); + STRINGISE_ENUM_CLASS(StridesizeALTERA); + STRINGISE_ENUM_CLASS(WordsizeALTERA); + STRINGISE_ENUM_CLASS(TrueDualPortALTERA); + STRINGISE_ENUM_CLASS(BurstCoalesceALTERA); + STRINGISE_ENUM_CLASS(CacheSizeALTERA); + STRINGISE_ENUM_CLASS(DontStaticallyCoalesceALTERA); + STRINGISE_ENUM_CLASS(PrefetchALTERA); + STRINGISE_ENUM_CLASS(StallEnableALTERA); + STRINGISE_ENUM_CLASS(FuseLoopsInFunctionALTERA); + STRINGISE_ENUM_CLASS(MathOpDSPModeALTERA); STRINGISE_ENUM_CLASS(AliasScopeINTEL); STRINGISE_ENUM_CLASS(NoAliasINTEL); - STRINGISE_ENUM_CLASS(InitiationIntervalINTEL); - STRINGISE_ENUM_CLASS(MaxConcurrencyINTEL); - STRINGISE_ENUM_CLASS(PipelineEnableINTEL); - STRINGISE_ENUM_CLASS(BufferLocationINTEL); - STRINGISE_ENUM_CLASS(IOPipeStorageINTEL); + STRINGISE_ENUM_CLASS(InitiationIntervalALTERA); + STRINGISE_ENUM_CLASS(MaxConcurrencyALTERA); + STRINGISE_ENUM_CLASS(PipelineEnableALTERA); + STRINGISE_ENUM_CLASS(BufferLocationALTERA); + STRINGISE_ENUM_CLASS(IOPipeStorageALTERA); STRINGISE_ENUM_CLASS(FunctionFloatingPointModeINTEL); STRINGISE_ENUM_CLASS(SingleElementVectorINTEL); STRINGISE_ENUM_CLASS(VectorComputeCallableFunctionINTEL); STRINGISE_ENUM_CLASS(MediaBlockIOINTEL); - STRINGISE_ENUM_CLASS(StallFreeINTEL); + STRINGISE_ENUM_CLASS(StallFreeALTERA); STRINGISE_ENUM_CLASS(FPMaxErrorDecorationINTEL); - STRINGISE_ENUM_CLASS(LatencyControlLabelINTEL); - STRINGISE_ENUM_CLASS(LatencyControlConstraintINTEL); - STRINGISE_ENUM_CLASS(ConduitKernelArgumentINTEL); - STRINGISE_ENUM_CLASS(RegisterMapKernelArgumentINTEL); - STRINGISE_ENUM_CLASS(MMHostInterfaceAddressWidthINTEL); - STRINGISE_ENUM_CLASS(MMHostInterfaceDataWidthINTEL); - STRINGISE_ENUM_CLASS(MMHostInterfaceLatencyINTEL); - STRINGISE_ENUM_CLASS(MMHostInterfaceReadWriteModeINTEL); - STRINGISE_ENUM_CLASS(MMHostInterfaceMaxBurstINTEL); - STRINGISE_ENUM_CLASS(MMHostInterfaceWaitRequestINTEL); - STRINGISE_ENUM_CLASS(StableKernelArgumentINTEL); + STRINGISE_ENUM_CLASS(LatencyControlLabelALTERA); + STRINGISE_ENUM_CLASS(LatencyControlConstraintALTERA); + STRINGISE_ENUM_CLASS(ConduitKernelArgumentALTERA); + STRINGISE_ENUM_CLASS(RegisterMapKernelArgumentALTERA); + STRINGISE_ENUM_CLASS(MMHostInterfaceAddressWidthALTERA); + STRINGISE_ENUM_CLASS(MMHostInterfaceDataWidthALTERA); + STRINGISE_ENUM_CLASS(MMHostInterfaceLatencyALTERA); + STRINGISE_ENUM_CLASS(MMHostInterfaceReadWriteModeALTERA); + STRINGISE_ENUM_CLASS(MMHostInterfaceMaxBurstALTERA); + STRINGISE_ENUM_CLASS(MMHostInterfaceWaitRequestALTERA); + STRINGISE_ENUM_CLASS(StableKernelArgumentALTERA); STRINGISE_ENUM_CLASS(HostAccessINTEL); - STRINGISE_ENUM_CLASS(InitModeINTEL); - STRINGISE_ENUM_CLASS(ImplementInRegisterMapINTEL); + STRINGISE_ENUM_CLASS(InitModeALTERA); + STRINGISE_ENUM_CLASS(ImplementInRegisterMapALTERA); + STRINGISE_ENUM_CLASS(ConditionalINTEL); STRINGISE_ENUM_CLASS(CacheControlLoadINTEL); STRINGISE_ENUM_CLASS(CacheControlStoreINTEL); } @@ -1173,7 +1160,10 @@ rdcstr DoStringise(const rdcspv::Capability &el) STRINGISE_ENUM_CLASS(TensorsARM); STRINGISE_ENUM_CLASS(StorageTensorArrayDynamicIndexingARM); STRINGISE_ENUM_CLASS(StorageTensorArrayNonUniformIndexingARM); + STRINGISE_ENUM_CLASS(GraphARM); STRINGISE_ENUM_CLASS(CooperativeMatrixLayoutsARM); + STRINGISE_ENUM_CLASS(Float8EXT); + STRINGISE_ENUM_CLASS(Float8CooperativeMatrixEXT); STRINGISE_ENUM_CLASS(FragmentShadingRateKHR); STRINGISE_ENUM_CLASS(SubgroupBallotKHR); STRINGISE_ENUM_CLASS(DrawParameters); @@ -1208,6 +1198,7 @@ rdcstr DoStringise(const rdcspv::Capability &el) STRINGISE_ENUM_CLASS(TextureBoxFilterQCOM); STRINGISE_ENUM_CLASS(TextureBlockMatchQCOM); STRINGISE_ENUM_CLASS(TileShadingQCOM); + STRINGISE_ENUM_CLASS(CooperativeMatrixConversionQCOM); STRINGISE_ENUM_CLASS(TextureBlockMatch2QCOM); STRINGISE_ENUM_CLASS(Float16ImageAMD); STRINGISE_ENUM_CLASS(ImageGatherBiasLodAMD); @@ -1271,6 +1262,7 @@ rdcstr DoStringise(const rdcspv::Capability &el) STRINGISE_ENUM_CLASS(RawAccessChainsNV); STRINGISE_ENUM_CLASS(RayTracingSpheresGeometryNV); STRINGISE_ENUM_CLASS(RayTracingLinearSweptSpheresGeometryNV); + STRINGISE_ENUM_CLASS(Shader64BitIndexingEXT); STRINGISE_ENUM_CLASS(CooperativeMatrixReductionsNV); STRINGISE_ENUM_CLASS(CooperativeMatrixConversionsNV); STRINGISE_ENUM_CLASS(CooperativeMatrixPerElementOperationsNV); @@ -1300,27 +1292,27 @@ rdcstr DoStringise(const rdcspv::Capability &el) STRINGISE_ENUM_CLASS(SubgroupAvcMotionEstimationChromaINTEL); STRINGISE_ENUM_CLASS(VariableLengthArrayINTEL); STRINGISE_ENUM_CLASS(FunctionFloatControlINTEL); - STRINGISE_ENUM_CLASS(FPGAMemoryAttributesINTEL); + STRINGISE_ENUM_CLASS(FPGAMemoryAttributesALTERA); STRINGISE_ENUM_CLASS(FPFastMathModeINTEL); - STRINGISE_ENUM_CLASS(ArbitraryPrecisionIntegersINTEL); - STRINGISE_ENUM_CLASS(ArbitraryPrecisionFloatingPointINTEL); + STRINGISE_ENUM_CLASS(ArbitraryPrecisionIntegersALTERA); + STRINGISE_ENUM_CLASS(ArbitraryPrecisionFloatingPointALTERA); STRINGISE_ENUM_CLASS(UnstructuredLoopControlsINTEL); - STRINGISE_ENUM_CLASS(FPGALoopControlsINTEL); + STRINGISE_ENUM_CLASS(FPGALoopControlsALTERA); STRINGISE_ENUM_CLASS(KernelAttributesINTEL); STRINGISE_ENUM_CLASS(FPGAKernelAttributesINTEL); - STRINGISE_ENUM_CLASS(FPGAMemoryAccessesINTEL); - STRINGISE_ENUM_CLASS(FPGAClusterAttributesINTEL); - STRINGISE_ENUM_CLASS(LoopFuseINTEL); - STRINGISE_ENUM_CLASS(FPGADSPControlINTEL); + STRINGISE_ENUM_CLASS(FPGAMemoryAccessesALTERA); + STRINGISE_ENUM_CLASS(FPGAClusterAttributesALTERA); + STRINGISE_ENUM_CLASS(LoopFuseALTERA); + STRINGISE_ENUM_CLASS(FPGADSPControlALTERA); STRINGISE_ENUM_CLASS(MemoryAccessAliasingINTEL); - STRINGISE_ENUM_CLASS(FPGAInvocationPipeliningAttributesINTEL); - STRINGISE_ENUM_CLASS(FPGABufferLocationINTEL); - STRINGISE_ENUM_CLASS(ArbitraryPrecisionFixedPointINTEL); - STRINGISE_ENUM_CLASS(USMStorageClassesINTEL); - STRINGISE_ENUM_CLASS(RuntimeAlignedAttributeINTEL); - STRINGISE_ENUM_CLASS(IOPipesINTEL); - STRINGISE_ENUM_CLASS(BlockingPipesINTEL); - STRINGISE_ENUM_CLASS(FPGARegINTEL); + STRINGISE_ENUM_CLASS(FPGAInvocationPipeliningAttributesALTERA); + STRINGISE_ENUM_CLASS(FPGABufferLocationALTERA); + STRINGISE_ENUM_CLASS(ArbitraryPrecisionFixedPointALTERA); + STRINGISE_ENUM_CLASS(USMStorageClassesALTERA); + STRINGISE_ENUM_CLASS(RuntimeAlignedAttributeALTERA); + STRINGISE_ENUM_CLASS(IOPipesALTERA); + STRINGISE_ENUM_CLASS(BlockingPipesALTERA); + STRINGISE_ENUM_CLASS(FPGARegALTERA); STRINGISE_ENUM_CLASS(DotProductInputAll); STRINGISE_ENUM_CLASS(DotProductInput4x8Bit); STRINGISE_ENUM_CLASS(DotProductInput4x8BitPacked); @@ -1331,6 +1323,7 @@ rdcstr DoStringise(const rdcspv::Capability &el) STRINGISE_ENUM_CLASS(BitInstructions); STRINGISE_ENUM_CLASS(GroupNonUniformRotateKHR); STRINGISE_ENUM_CLASS(FloatControls2); + STRINGISE_ENUM_CLASS(FMAKHR); STRINGISE_ENUM_CLASS(AtomicFloat32AddEXT); STRINGISE_ENUM_CLASS(AtomicFloat64AddEXT); STRINGISE_ENUM_CLASS(LongCompositesINTEL); @@ -1340,25 +1333,29 @@ rdcstr DoStringise(const rdcspv::Capability &el) STRINGISE_ENUM_CLASS(BFloat16ConversionINTEL); STRINGISE_ENUM_CLASS(SplitBarrierINTEL); STRINGISE_ENUM_CLASS(ArithmeticFenceEXT); - STRINGISE_ENUM_CLASS(FPGAClusterAttributesV2INTEL); + STRINGISE_ENUM_CLASS(FPGAClusterAttributesV2ALTERA); STRINGISE_ENUM_CLASS(FPGAKernelAttributesv2INTEL); - STRINGISE_ENUM_CLASS(TaskSequenceINTEL); + STRINGISE_ENUM_CLASS(TaskSequenceALTERA); STRINGISE_ENUM_CLASS(FPMaxErrorINTEL); - STRINGISE_ENUM_CLASS(FPGALatencyControlINTEL); - STRINGISE_ENUM_CLASS(FPGAArgumentInterfacesINTEL); + STRINGISE_ENUM_CLASS(FPGALatencyControlALTERA); + STRINGISE_ENUM_CLASS(FPGAArgumentInterfacesALTERA); STRINGISE_ENUM_CLASS(GlobalVariableHostAccessINTEL); - STRINGISE_ENUM_CLASS(GlobalVariableFPGADecorationsINTEL); + STRINGISE_ENUM_CLASS(GlobalVariableFPGADecorationsALTERA); STRINGISE_ENUM_CLASS(SubgroupBufferPrefetchINTEL); STRINGISE_ENUM_CLASS(Subgroup2DBlockIOINTEL); STRINGISE_ENUM_CLASS(Subgroup2DBlockTransformINTEL); STRINGISE_ENUM_CLASS(Subgroup2DBlockTransposeINTEL); STRINGISE_ENUM_CLASS(SubgroupMatrixMultiplyAccumulateINTEL); STRINGISE_ENUM_CLASS(TernaryBitwiseFunctionINTEL); + STRINGISE_ENUM_CLASS(UntypedVariableLengthArrayINTEL); + STRINGISE_ENUM_CLASS(SpecConditionalINTEL); + STRINGISE_ENUM_CLASS(FunctionVariantsINTEL); STRINGISE_ENUM_CLASS(GroupUniformArithmeticKHR); STRINGISE_ENUM_CLASS(TensorFloat32RoundingINTEL); STRINGISE_ENUM_CLASS(MaskedGatherScatterINTEL); STRINGISE_ENUM_CLASS(CacheControlsINTEL); STRINGISE_ENUM_CLASS(RegisterLimitsINTEL); + STRINGISE_ENUM_CLASS(BindlessImagesINTEL); } END_ENUM_STRINGISE(); } @@ -1492,8 +1489,8 @@ rdcstr DoStringise(const rdcspv::InitializationModeQualifier &el) { BEGIN_ENUM_STRINGISE(rdcspv::InitializationModeQualifier); { - STRINGISE_ENUM_CLASS(InitOnDeviceReprogramINTEL); - STRINGISE_ENUM_CLASS(InitOnDeviceResetINTEL); + STRINGISE_ENUM_CLASS(InitOnDeviceReprogramALTERA); + STRINGISE_ENUM_CLASS(InitOnDeviceResetALTERA); } END_ENUM_STRINGISE(); } @@ -1566,6 +1563,8 @@ rdcstr DoStringise(const rdcspv::FPEncoding &el) BEGIN_ENUM_STRINGISE(rdcspv::FPEncoding); { STRINGISE_ENUM_CLASS(BFloat16KHR); + STRINGISE_ENUM_CLASS(Float8E4M3EXT); + STRINGISE_ENUM_CLASS(Float8E5M2EXT); } END_ENUM_STRINGISE(); } @@ -1979,6 +1978,13 @@ rdcstr DoStringise(const rdcspv::Op &el) STRINGISE_ENUM_CLASS(TensorReadARM); STRINGISE_ENUM_CLASS(TensorWriteARM); STRINGISE_ENUM_CLASS(TensorQuerySizeARM); + STRINGISE_ENUM_CLASS(GraphConstantARM); + STRINGISE_ENUM_CLASS(GraphEntryPointARM); + STRINGISE_ENUM_CLASS(GraphARM); + STRINGISE_ENUM_CLASS(GraphInputARM); + STRINGISE_ENUM_CLASS(GraphSetOutputARM); + STRINGISE_ENUM_CLASS(GraphEndARM); + STRINGISE_ENUM_CLASS(TypeGraphARM); STRINGISE_ENUM_CLASS(TerminateInvocation); STRINGISE_ENUM_CLASS(TypeUntypedPointerKHR); STRINGISE_ENUM_CLASS(UntypedVariableKHR); @@ -1990,12 +1996,14 @@ rdcstr DoStringise(const rdcspv::Op &el) STRINGISE_ENUM_CLASS(UntypedInBoundsPtrAccessChainKHR); STRINGISE_ENUM_CLASS(UntypedArrayLengthKHR); STRINGISE_ENUM_CLASS(UntypedPrefetchKHR); + STRINGISE_ENUM_CLASS(FmaKHR); STRINGISE_ENUM_CLASS(SubgroupAllKHR); STRINGISE_ENUM_CLASS(SubgroupAnyKHR); STRINGISE_ENUM_CLASS(SubgroupAllEqualKHR); STRINGISE_ENUM_CLASS(GroupNonUniformRotateKHR); STRINGISE_ENUM_CLASS(SubgroupReadInvocationKHR); STRINGISE_ENUM_CLASS(ExtInstWithForwardRefsKHR); + STRINGISE_ENUM_CLASS(UntypedGroupAsyncCopyKHR); STRINGISE_ENUM_CLASS(TraceRayKHR); STRINGISE_ENUM_CLASS(ExecuteCallableKHR); STRINGISE_ENUM_CLASS(ConvertUToAccelerationStructureKHR); @@ -2026,10 +2034,14 @@ rdcstr DoStringise(const rdcspv::Op &el) STRINGISE_ENUM_CLASS(ImageBoxFilterQCOM); STRINGISE_ENUM_CLASS(ImageBlockMatchSSDQCOM); STRINGISE_ENUM_CLASS(ImageBlockMatchSADQCOM); + STRINGISE_ENUM_CLASS(BitCastArrayQCOM); STRINGISE_ENUM_CLASS(ImageBlockMatchWindowSSDQCOM); STRINGISE_ENUM_CLASS(ImageBlockMatchWindowSADQCOM); STRINGISE_ENUM_CLASS(ImageBlockMatchGatherSSDQCOM); STRINGISE_ENUM_CLASS(ImageBlockMatchGatherSADQCOM); + STRINGISE_ENUM_CLASS(CompositeConstructCoopMatQCOM); + STRINGISE_ENUM_CLASS(CompositeExtractCoopMatQCOM); + STRINGISE_ENUM_CLASS(ExtractSubArrayQCOM); STRINGISE_ENUM_CLASS(GroupIAddNonUniformAMD); STRINGISE_ENUM_CLASS(GroupFAddNonUniformAMD); STRINGISE_ENUM_CLASS(GroupFMinNonUniformAMD); @@ -2108,7 +2120,7 @@ rdcstr DoStringise(const rdcspv::Op &el) STRINGISE_ENUM_CLASS(RayQueryGetIntersectionTriangleVertexPositionsKHR); STRINGISE_ENUM_CLASS(TypeAccelerationStructureKHR); STRINGISE_ENUM_CLASS(ExecuteCallableNV); - STRINGISE_ENUM_CLASS(RayQueryGetClusterIdNV); + STRINGISE_ENUM_CLASS(RayQueryGetIntersectionClusterIdNV); STRINGISE_ENUM_CLASS(HitObjectGetClusterIdNV); STRINGISE_ENUM_CLASS(TypeCooperativeMatrixNV); STRINGISE_ENUM_CLASS(CooperativeMatrixLoadNV); @@ -2187,10 +2199,10 @@ rdcstr DoStringise(const rdcspv::Op &el) STRINGISE_ENUM_CLASS(ExpectKHR); STRINGISE_ENUM_CLASS(DecorateString); STRINGISE_ENUM_CLASS(MemberDecorateString); + STRINGISE_ENUM_CLASS(VariableLengthArrayINTEL); + STRINGISE_ENUM_CLASS(SaveMemoryINTEL); + STRINGISE_ENUM_CLASS(RestoreMemoryINTEL); STRINGISE_ENUM_CLASS(LoopControlINTEL); - STRINGISE_ENUM_CLASS(ReadPipeBlockingINTEL); - STRINGISE_ENUM_CLASS(WritePipeBlockingINTEL); - STRINGISE_ENUM_CLASS(FPGARegINTEL); STRINGISE_ENUM_CLASS(RayQueryGetRayTMinKHR); STRINGISE_ENUM_CLASS(RayQueryGetRayFlagsKHR); STRINGISE_ENUM_CLASS(RayQueryGetIntersectionTKHR); @@ -2219,11 +2231,6 @@ rdcstr DoStringise(const rdcspv::Op &el) STRINGISE_ENUM_CLASS(ControlBarrierArriveINTEL); STRINGISE_ENUM_CLASS(ControlBarrierWaitINTEL); STRINGISE_ENUM_CLASS(ArithmeticFenceEXT); - STRINGISE_ENUM_CLASS(TaskSequenceCreateINTEL); - STRINGISE_ENUM_CLASS(TaskSequenceAsyncINTEL); - STRINGISE_ENUM_CLASS(TaskSequenceGetINTEL); - STRINGISE_ENUM_CLASS(TaskSequenceReleaseINTEL); - STRINGISE_ENUM_CLASS(TypeTaskSequenceINTEL); STRINGISE_ENUM_CLASS(SubgroupBlockPrefetchINTEL); STRINGISE_ENUM_CLASS(Subgroup2DBlockLoadINTEL); STRINGISE_ENUM_CLASS(Subgroup2DBlockLoadTransformINTEL); @@ -2232,6 +2239,14 @@ rdcstr DoStringise(const rdcspv::Op &el) STRINGISE_ENUM_CLASS(Subgroup2DBlockStoreINTEL); STRINGISE_ENUM_CLASS(SubgroupMatrixMultiplyAccumulateINTEL); STRINGISE_ENUM_CLASS(BitwiseFunctionINTEL); + STRINGISE_ENUM_CLASS(UntypedVariableLengthArrayINTEL); + STRINGISE_ENUM_CLASS(ConditionalExtensionINTEL); + STRINGISE_ENUM_CLASS(ConditionalEntryPointINTEL); + STRINGISE_ENUM_CLASS(ConditionalCapabilityINTEL); + STRINGISE_ENUM_CLASS(SpecConstantTargetINTEL); + STRINGISE_ENUM_CLASS(SpecConstantArchitectureINTEL); + STRINGISE_ENUM_CLASS(SpecConstantCapabilitiesINTEL); + STRINGISE_ENUM_CLASS(ConditionalCopyObjectINTEL); STRINGISE_ENUM_CLASS(GroupIMulKHR); STRINGISE_ENUM_CLASS(GroupFMulKHR); STRINGISE_ENUM_CLASS(GroupBitwiseAndKHR); @@ -2243,6 +2258,9 @@ rdcstr DoStringise(const rdcspv::Op &el) STRINGISE_ENUM_CLASS(RoundFToTF32INTEL); STRINGISE_ENUM_CLASS(MaskedGatherINTEL); STRINGISE_ENUM_CLASS(MaskedScatterINTEL); + STRINGISE_ENUM_CLASS(ConvertHandleToImageINTEL); + STRINGISE_ENUM_CLASS(ConvertHandleToSamplerINTEL); + STRINGISE_ENUM_CLASS(ConvertHandleToSampledImageINTEL); } END_ENUM_STRINGISE(); } @@ -2346,26 +2364,26 @@ rdcstr ParamToStr(const std::function &idName, const rdcspv: ret += "PeelCount" "(" + ToStr(el.peelCount) + ")" ", "; if(el.flags & LoopControl::PartialCount) ret += "PartialCount" "(" + ToStr(el.partialCount) + ")" ", "; - if(el.flags & LoopControl::InitiationIntervalINTEL) - ret += "InitiationIntervalINTEL" "(" + ToStr(el.initiationIntervalINTEL) + ")" ", "; - if(el.flags & LoopControl::MaxConcurrencyINTEL) - ret += "MaxConcurrencyINTEL" "(" + ToStr(el.maxConcurrencyINTEL) + ")" ", "; - if(el.flags & LoopControl::DependencyArrayINTEL) - ret += "DependencyArrayINTEL" "(" + ToStr(el.dependencyArrayINTEL) + ")" ", "; - if(el.flags & LoopControl::PipelineEnableINTEL) - ret += "PipelineEnableINTEL" "(" + ToStr(el.pipelineEnableINTEL) + ")" ", "; - if(el.flags & LoopControl::LoopCoalesceINTEL) - ret += "LoopCoalesceINTEL" "(" + ToStr(el.loopCoalesceINTEL) + ")" ", "; - if(el.flags & LoopControl::MaxInterleavingINTEL) - ret += "MaxInterleavingINTEL" "(" + ToStr(el.maxInterleavingINTEL) + ")" ", "; - if(el.flags & LoopControl::SpeculatedIterationsINTEL) - ret += "SpeculatedIterationsINTEL" "(" + ToStr(el.speculatedIterationsINTEL) + ")" ", "; - if(el.flags & LoopControl::NoFusionINTEL) - ret += "NoFusionINTEL" ", "; - if(el.flags & LoopControl::LoopCountINTEL) - ret += "LoopCountINTEL" "(" + ToStr(el.loopCountINTEL) + ")" ", "; - if(el.flags & LoopControl::MaxReinvocationDelayINTEL) - ret += "MaxReinvocationDelayINTEL" "(" + ToStr(el.maxReinvocationDelayINTEL) + ")" ", "; + if(el.flags & LoopControl::InitiationIntervalALTERA) + ret += "InitiationIntervalALTERA" "(" + ToStr(el.initiationIntervalALTERA) + ")" ", "; + if(el.flags & LoopControl::MaxConcurrencyALTERA) + ret += "MaxConcurrencyALTERA" "(" + ToStr(el.maxConcurrencyALTERA) + ")" ", "; + if(el.flags & LoopControl::DependencyArrayALTERA) + ret += "DependencyArrayALTERA" "(" + ToStr(el.dependencyArrayALTERA) + ")" ", "; + if(el.flags & LoopControl::PipelineEnableALTERA) + ret += "PipelineEnableALTERA" "(" + ToStr(el.pipelineEnableALTERA) + ")" ", "; + if(el.flags & LoopControl::LoopCoalesceALTERA) + ret += "LoopCoalesceALTERA" "(" + ToStr(el.loopCoalesceALTERA) + ")" ", "; + if(el.flags & LoopControl::MaxInterleavingALTERA) + ret += "MaxInterleavingALTERA" "(" + ToStr(el.maxInterleavingALTERA) + ")" ", "; + if(el.flags & LoopControl::SpeculatedIterationsALTERA) + ret += "SpeculatedIterationsALTERA" "(" + ToStr(el.speculatedIterationsALTERA) + ")" ", "; + if(el.flags & LoopControl::NoFusionALTERA) + ret += "NoFusionALTERA" ", "; + if(el.flags & LoopControl::LoopCountALTERA) + ret += "LoopCountALTERA" "(" + ToStr(el.loopCountALTERA) + ")" ", "; + if(el.flags & LoopControl::MaxReinvocationDelayALTERA) + ret += "MaxReinvocationDelayALTERA" "(" + ToStr(el.maxReinvocationDelayALTERA) + ")" ", "; // remove trailing ", " if(ret.size() > 2) @@ -2572,66 +2590,68 @@ rdcstr ParamToStr(const std::function &idName, const rdcspv: ret += "(" + ToStr(el.functionRoundingModeINTEL.targetWidth) + ", " + ToStr(el.functionRoundingModeINTEL.fPRoundingMode) + ")"; break; case Decoration::FunctionDenormModeINTEL: ret += "(" + ToStr(el.functionDenormModeINTEL.targetWidth) + ", " + ToStr(el.functionDenormModeINTEL.fPDenormMode) + ")"; break; - case Decoration::NumbanksINTEL: - ret += "(" + ToStr(el.numbanksINTEL) + ")"; break; - case Decoration::BankwidthINTEL: - ret += "(" + ToStr(el.bankwidthINTEL) + ")"; break; - case Decoration::MaxPrivateCopiesINTEL: - ret += "(" + ToStr(el.maxPrivateCopiesINTEL) + ")"; break; - case Decoration::MaxReplicatesINTEL: - ret += "(" + ToStr(el.maxReplicatesINTEL) + ")"; break; - case Decoration::BankBitsINTEL: - ret += "(" + ToStr(el.bankBitsINTEL) + ")"; break; - case Decoration::ForcePow2DepthINTEL: - ret += "(" + ToStr(el.forcePow2DepthINTEL) + ")"; break; - case Decoration::StridesizeINTEL: - ret += "(" + ToStr(el.stridesizeINTEL) + ")"; break; - case Decoration::WordsizeINTEL: - ret += "(" + ToStr(el.wordsizeINTEL) + ")"; break; - case Decoration::CacheSizeINTEL: - ret += "(" + ToStr(el.cacheSizeINTEL) + ")"; break; - case Decoration::PrefetchINTEL: - ret += "(" + ToStr(el.prefetchINTEL) + ")"; break; - case Decoration::MathOpDSPModeINTEL: - ret += "(" + ToStr(el.mathOpDSPModeINTEL.mode) + ", " + ToStr(el.mathOpDSPModeINTEL.propagate) + ")"; break; + case Decoration::NumbanksALTERA: + ret += "(" + ToStr(el.numbanksALTERA) + ")"; break; + case Decoration::BankwidthALTERA: + ret += "(" + ToStr(el.bankwidthALTERA) + ")"; break; + case Decoration::MaxPrivateCopiesALTERA: + ret += "(" + ToStr(el.maxPrivateCopiesALTERA) + ")"; break; + case Decoration::MaxReplicatesALTERA: + ret += "(" + ToStr(el.maxReplicatesALTERA) + ")"; break; + case Decoration::BankBitsALTERA: + ret += "(" + ToStr(el.bankBitsALTERA) + ")"; break; + case Decoration::ForcePow2DepthALTERA: + ret += "(" + ToStr(el.forcePow2DepthALTERA) + ")"; break; + case Decoration::StridesizeALTERA: + ret += "(" + ToStr(el.stridesizeALTERA) + ")"; break; + case Decoration::WordsizeALTERA: + ret += "(" + ToStr(el.wordsizeALTERA) + ")"; break; + case Decoration::CacheSizeALTERA: + ret += "(" + ToStr(el.cacheSizeALTERA) + ")"; break; + case Decoration::PrefetchALTERA: + ret += "(" + ToStr(el.prefetchALTERA) + ")"; break; + case Decoration::MathOpDSPModeALTERA: + ret += "(" + ToStr(el.mathOpDSPModeALTERA.mode) + ", " + ToStr(el.mathOpDSPModeALTERA.propagate) + ")"; break; case Decoration::AliasScopeINTEL: ret += "(" + idName(el.aliasScopeINTEL) + ")"; break; case Decoration::NoAliasINTEL: ret += "(" + idName(el.noAliasINTEL) + ")"; break; - case Decoration::InitiationIntervalINTEL: - ret += "(" + ToStr(el.initiationIntervalINTEL) + ")"; break; - case Decoration::MaxConcurrencyINTEL: - ret += "(" + ToStr(el.maxConcurrencyINTEL) + ")"; break; - case Decoration::PipelineEnableINTEL: - ret += "(" + ToStr(el.pipelineEnableINTEL) + ")"; break; - case Decoration::BufferLocationINTEL: - ret += "(" + ToStr(el.bufferLocationINTEL) + ")"; break; - case Decoration::IOPipeStorageINTEL: - ret += "(" + ToStr(el.iOPipeStorageINTEL) + ")"; break; + case Decoration::InitiationIntervalALTERA: + ret += "(" + ToStr(el.initiationIntervalALTERA) + ")"; break; + case Decoration::MaxConcurrencyALTERA: + ret += "(" + ToStr(el.maxConcurrencyALTERA) + ")"; break; + case Decoration::PipelineEnableALTERA: + ret += "(" + ToStr(el.pipelineEnableALTERA) + ")"; break; + case Decoration::BufferLocationALTERA: + ret += "(" + ToStr(el.bufferLocationALTERA) + ")"; break; + case Decoration::IOPipeStorageALTERA: + ret += "(" + ToStr(el.iOPipeStorageALTERA) + ")"; break; case Decoration::FunctionFloatingPointModeINTEL: ret += "(" + ToStr(el.functionFloatingPointModeINTEL.targetWidth) + ", " + ToStr(el.functionFloatingPointModeINTEL.fPOperationMode) + ")"; break; case Decoration::FPMaxErrorDecorationINTEL: ret += "(" + ToStr(el.fPMaxErrorDecorationINTEL) + ")"; break; - case Decoration::LatencyControlLabelINTEL: - ret += "(" + ToStr(el.latencyControlLabelINTEL) + ")"; break; - case Decoration::LatencyControlConstraintINTEL: - ret += "(" + ToStr(el.latencyControlConstraintINTEL.relativeTo) + ", " + ToStr(el.latencyControlConstraintINTEL.controlType) + ", " + ToStr(el.latencyControlConstraintINTEL.relativeCycle) + ")"; break; - case Decoration::MMHostInterfaceAddressWidthINTEL: - ret += "(" + ToStr(el.mMHostInterfaceAddressWidthINTEL) + ")"; break; - case Decoration::MMHostInterfaceDataWidthINTEL: - ret += "(" + ToStr(el.mMHostInterfaceDataWidthINTEL) + ")"; break; - case Decoration::MMHostInterfaceLatencyINTEL: - ret += "(" + ToStr(el.mMHostInterfaceLatencyINTEL) + ")"; break; - case Decoration::MMHostInterfaceReadWriteModeINTEL: - ret += "(" + ToStr(el.mMHostInterfaceReadWriteModeINTEL) + ")"; break; - case Decoration::MMHostInterfaceMaxBurstINTEL: - ret += "(" + ToStr(el.mMHostInterfaceMaxBurstINTEL) + ")"; break; - case Decoration::MMHostInterfaceWaitRequestINTEL: - ret += "(" + ToStr(el.mMHostInterfaceWaitRequestINTEL) + ")"; break; - case Decoration::InitModeINTEL: - ret += "(" + ToStr(el.initModeINTEL) + ")"; break; - case Decoration::ImplementInRegisterMapINTEL: - ret += "(" + ToStr(el.implementInRegisterMapINTEL) + ")"; break; + case Decoration::LatencyControlLabelALTERA: + ret += "(" + ToStr(el.latencyControlLabelALTERA) + ")"; break; + case Decoration::LatencyControlConstraintALTERA: + ret += "(" + ToStr(el.latencyControlConstraintALTERA.relativeTo) + ", " + ToStr(el.latencyControlConstraintALTERA.controlType) + ", " + ToStr(el.latencyControlConstraintALTERA.relativeCycle) + ")"; break; + case Decoration::MMHostInterfaceAddressWidthALTERA: + ret += "(" + ToStr(el.mMHostInterfaceAddressWidthALTERA) + ")"; break; + case Decoration::MMHostInterfaceDataWidthALTERA: + ret += "(" + ToStr(el.mMHostInterfaceDataWidthALTERA) + ")"; break; + case Decoration::MMHostInterfaceLatencyALTERA: + ret += "(" + ToStr(el.mMHostInterfaceLatencyALTERA) + ")"; break; + case Decoration::MMHostInterfaceReadWriteModeALTERA: + ret += "(" + ToStr(el.mMHostInterfaceReadWriteModeALTERA) + ")"; break; + case Decoration::MMHostInterfaceMaxBurstALTERA: + ret += "(" + ToStr(el.mMHostInterfaceMaxBurstALTERA) + ")"; break; + case Decoration::MMHostInterfaceWaitRequestALTERA: + ret += "(" + ToStr(el.mMHostInterfaceWaitRequestALTERA) + ")"; break; + case Decoration::InitModeALTERA: + ret += "(" + ToStr(el.initModeALTERA) + ")"; break; + case Decoration::ImplementInRegisterMapALTERA: + ret += "(" + ToStr(el.implementInRegisterMapALTERA) + ")"; break; + case Decoration::ConditionalINTEL: + ret += "(" + idName(el.conditionalINTEL) + ")"; break; case Decoration::CacheControlLoadINTEL: ret += "(" + ToStr(el.cacheControlLoadINTEL.cacheLevel) + ", " + ToStr(el.cacheControlLoadINTEL.cacheControl) + ")"; break; case Decoration::CacheControlStoreINTEL: @@ -4624,6 +4644,37 @@ void OpDecoder::ForEachID(const ConstIter &it, const std::function(it, word); + for(; word < size; word++) callback(Id::fromWord(it.word(word)), false); + break; + case rdcspv::Op::GraphARM: + callback(Id::fromWord(it.word(1)), false); + callback(Id::fromWord(it.word(2)), true); + break; + case rdcspv::Op::GraphInputARM: + callback(Id::fromWord(it.word(1)), false); + callback(Id::fromWord(it.word(2)), true); + callback(Id::fromWord(it.word(3)), false); + for(size_t i=0; i < size-4; i++) callback(Id::fromWord(it.word(4+i)), false); + break; + case rdcspv::Op::GraphSetOutputARM: + callback(Id::fromWord(it.word(1)), false); + callback(Id::fromWord(it.word(2)), false); + for(size_t i=0; i < size-3; i++) callback(Id::fromWord(it.word(3+i)), false); + break; + case rdcspv::Op::GraphEndARM: + break; + case rdcspv::Op::TypeGraphARM: + callback(Id::fromWord(it.word(1)), true); + for(size_t i=0; i < size-3; i++) callback(Id::fromWord(it.word(3+i)), false); + break; case rdcspv::Op::TerminateInvocation: break; case rdcspv::Op::TypeUntypedPointerKHR: @@ -4688,6 +4739,13 @@ void OpDecoder::ForEachID(const ConstIter &it, const std::function(it, word); + for(; word < size; word++) callback(Id::fromWord(it.word(word)), false); + break; + case rdcspv::Op::ConditionalCapabilityINTEL: + callback(Id::fromWord(it.word(1)), false); + break; + case rdcspv::Op::SpecConstantTargetINTEL: + callback(Id::fromWord(it.word(1)), false); + callback(Id::fromWord(it.word(2)), true); + break; + case rdcspv::Op::SpecConstantArchitectureINTEL: + callback(Id::fromWord(it.word(1)), false); + callback(Id::fromWord(it.word(2)), true); + break; + case rdcspv::Op::SpecConstantCapabilitiesINTEL: + callback(Id::fromWord(it.word(1)), false); + callback(Id::fromWord(it.word(2)), true); + break; + case rdcspv::Op::ConditionalCopyObjectINTEL: + callback(Id::fromWord(it.word(1)), false); + callback(Id::fromWord(it.word(2)), true); + for(size_t i=0; i < size-3; i++) callback(Id::fromWord(it.word(3+i)), false); + break; case rdcspv::Op::GroupIMulKHR: callback(Id::fromWord(it.word(1)), false); callback(Id::fromWord(it.word(2)), true); @@ -6214,6 +6315,21 @@ void OpDecoder::ForEachID(const ConstIter &it, const std::function +inline Capability DecodeParam(const ConstIter &it, uint32_t &word) +{ + if(word >= it.size()) return Capability::Invalid; + + Capability ret = Capability(word); + word += 1; + return ret; +} + template<> inline Id DecodeParam(const ConstIter &it, uint32_t &word) { @@ -341,49 +335,49 @@ inline LoopControlAndParamDatas DecodeParam(const ConstIter &it, uint32_t &word) ret.partialCount = (uint32_t)it.word(word); word += 1; } - if(ret.flags & LoopControl::InitiationIntervalINTEL) + if(ret.flags & LoopControl::InitiationIntervalALTERA) { - ret.initiationIntervalINTEL = (uint32_t)it.word(word); + ret.initiationIntervalALTERA = (uint32_t)it.word(word); word += 1; } - if(ret.flags & LoopControl::MaxConcurrencyINTEL) + if(ret.flags & LoopControl::MaxConcurrencyALTERA) { - ret.maxConcurrencyINTEL = (uint32_t)it.word(word); + ret.maxConcurrencyALTERA = (uint32_t)it.word(word); word += 1; } - if(ret.flags & LoopControl::DependencyArrayINTEL) + if(ret.flags & LoopControl::DependencyArrayALTERA) { - ret.dependencyArrayINTEL = (uint32_t)it.word(word); + ret.dependencyArrayALTERA = (uint32_t)it.word(word); word += 1; } - if(ret.flags & LoopControl::PipelineEnableINTEL) + if(ret.flags & LoopControl::PipelineEnableALTERA) { - ret.pipelineEnableINTEL = (uint32_t)it.word(word); + ret.pipelineEnableALTERA = (uint32_t)it.word(word); word += 1; } - if(ret.flags & LoopControl::LoopCoalesceINTEL) + if(ret.flags & LoopControl::LoopCoalesceALTERA) { - ret.loopCoalesceINTEL = (uint32_t)it.word(word); + ret.loopCoalesceALTERA = (uint32_t)it.word(word); word += 1; } - if(ret.flags & LoopControl::MaxInterleavingINTEL) + if(ret.flags & LoopControl::MaxInterleavingALTERA) { - ret.maxInterleavingINTEL = (uint32_t)it.word(word); + ret.maxInterleavingALTERA = (uint32_t)it.word(word); word += 1; } - if(ret.flags & LoopControl::SpeculatedIterationsINTEL) + if(ret.flags & LoopControl::SpeculatedIterationsALTERA) { - ret.speculatedIterationsINTEL = (uint32_t)it.word(word); + ret.speculatedIterationsALTERA = (uint32_t)it.word(word); word += 1; } - if(ret.flags & LoopControl::LoopCountINTEL) + if(ret.flags & LoopControl::LoopCountALTERA) { - ret.loopCountINTEL = (uint32_t)it.word(word); + ret.loopCountALTERA = (uint32_t)it.word(word); word += 1; } - if(ret.flags & LoopControl::MaxReinvocationDelayINTEL) + if(ret.flags & LoopControl::MaxReinvocationDelayALTERA) { - ret.maxReinvocationDelayINTEL = (uint32_t)it.word(word); + ret.maxReinvocationDelayALTERA = (uint32_t)it.word(word); word += 1; } return ret; @@ -416,41 +410,41 @@ inline void EncodeParam(rdcarray &words, const LoopControlAndParamData { words.push_back((uint32_t)param.partialCount); } - if(param.flags & LoopControl::InitiationIntervalINTEL) + if(param.flags & LoopControl::InitiationIntervalALTERA) { - words.push_back((uint32_t)param.initiationIntervalINTEL); + words.push_back((uint32_t)param.initiationIntervalALTERA); } - if(param.flags & LoopControl::MaxConcurrencyINTEL) + if(param.flags & LoopControl::MaxConcurrencyALTERA) { - words.push_back((uint32_t)param.maxConcurrencyINTEL); + words.push_back((uint32_t)param.maxConcurrencyALTERA); } - if(param.flags & LoopControl::DependencyArrayINTEL) + if(param.flags & LoopControl::DependencyArrayALTERA) { - words.push_back((uint32_t)param.dependencyArrayINTEL); + words.push_back((uint32_t)param.dependencyArrayALTERA); } - if(param.flags & LoopControl::PipelineEnableINTEL) + if(param.flags & LoopControl::PipelineEnableALTERA) { - words.push_back((uint32_t)param.pipelineEnableINTEL); + words.push_back((uint32_t)param.pipelineEnableALTERA); } - if(param.flags & LoopControl::LoopCoalesceINTEL) + if(param.flags & LoopControl::LoopCoalesceALTERA) { - words.push_back((uint32_t)param.loopCoalesceINTEL); + words.push_back((uint32_t)param.loopCoalesceALTERA); } - if(param.flags & LoopControl::MaxInterleavingINTEL) + if(param.flags & LoopControl::MaxInterleavingALTERA) { - words.push_back((uint32_t)param.maxInterleavingINTEL); + words.push_back((uint32_t)param.maxInterleavingALTERA); } - if(param.flags & LoopControl::SpeculatedIterationsINTEL) + if(param.flags & LoopControl::SpeculatedIterationsALTERA) { - words.push_back((uint32_t)param.speculatedIterationsINTEL); + words.push_back((uint32_t)param.speculatedIterationsALTERA); } - if(param.flags & LoopControl::LoopCountINTEL) + if(param.flags & LoopControl::LoopCountALTERA) { - words.push_back((uint32_t)param.loopCountINTEL); + words.push_back((uint32_t)param.loopCountALTERA); } - if(param.flags & LoopControl::MaxReinvocationDelayINTEL) + if(param.flags & LoopControl::MaxReinvocationDelayALTERA) { - words.push_back((uint32_t)param.maxReinvocationDelayINTEL); + words.push_back((uint32_t)param.maxReinvocationDelayALTERA); } } @@ -464,15 +458,15 @@ inline uint16_t ExtraWordCount(const LoopControl loopControl) case LoopControl::IterationMultiple: return 1; case LoopControl::PeelCount: return 1; case LoopControl::PartialCount: return 1; - case LoopControl::InitiationIntervalINTEL: return 1; - case LoopControl::MaxConcurrencyINTEL: return 1; - case LoopControl::DependencyArrayINTEL: return 1; - case LoopControl::PipelineEnableINTEL: return 1; - case LoopControl::LoopCoalesceINTEL: return 1; - case LoopControl::MaxInterleavingINTEL: return 1; - case LoopControl::SpeculatedIterationsINTEL: return 1; - case LoopControl::LoopCountINTEL: return 1; - case LoopControl::MaxReinvocationDelayINTEL: return 1; + case LoopControl::InitiationIntervalALTERA: return 1; + case LoopControl::MaxConcurrencyALTERA: return 1; + case LoopControl::DependencyArrayALTERA: return 1; + case LoopControl::PipelineEnableALTERA: return 1; + case LoopControl::LoopCoalesceALTERA: return 1; + case LoopControl::MaxInterleavingALTERA: return 1; + case LoopControl::SpeculatedIterationsALTERA: return 1; + case LoopControl::LoopCountALTERA: return 1; + case LoopControl::MaxReinvocationDelayALTERA: return 1; default: break; } return 0; @@ -1956,145 +1950,145 @@ struct DecorationParam }; template<> -struct DecorationParam +struct DecorationParam { - uint32_t numbanksINTEL; - DecorationParam(uint32_t numbanksINTELParam) { numbanksINTEL = numbanksINTELParam; } + uint32_t numbanksALTERA; + DecorationParam(uint32_t numbanksALTERAParam) { numbanksALTERA = numbanksALTERAParam; } operator DecorationAndParamData() { - DecorationAndParamData ret(Decoration::NumbanksINTEL); - ret.numbanksINTEL = numbanksINTEL; + DecorationAndParamData ret(Decoration::NumbanksALTERA); + ret.numbanksALTERA = numbanksALTERA; return ret; } }; template<> -struct DecorationParam +struct DecorationParam { - uint32_t bankwidthINTEL; - DecorationParam(uint32_t bankwidthINTELParam) { bankwidthINTEL = bankwidthINTELParam; } + uint32_t bankwidthALTERA; + DecorationParam(uint32_t bankwidthALTERAParam) { bankwidthALTERA = bankwidthALTERAParam; } operator DecorationAndParamData() { - DecorationAndParamData ret(Decoration::BankwidthINTEL); - ret.bankwidthINTEL = bankwidthINTEL; + DecorationAndParamData ret(Decoration::BankwidthALTERA); + ret.bankwidthALTERA = bankwidthALTERA; return ret; } }; template<> -struct DecorationParam +struct DecorationParam { - uint32_t maxPrivateCopiesINTEL; - DecorationParam(uint32_t maxPrivateCopiesINTELParam) { maxPrivateCopiesINTEL = maxPrivateCopiesINTELParam; } + uint32_t maxPrivateCopiesALTERA; + DecorationParam(uint32_t maxPrivateCopiesALTERAParam) { maxPrivateCopiesALTERA = maxPrivateCopiesALTERAParam; } operator DecorationAndParamData() { - DecorationAndParamData ret(Decoration::MaxPrivateCopiesINTEL); - ret.maxPrivateCopiesINTEL = maxPrivateCopiesINTEL; + DecorationAndParamData ret(Decoration::MaxPrivateCopiesALTERA); + ret.maxPrivateCopiesALTERA = maxPrivateCopiesALTERA; return ret; } }; template<> -struct DecorationParam +struct DecorationParam { - uint32_t maxReplicatesINTEL; - DecorationParam(uint32_t maxReplicatesINTELParam) { maxReplicatesINTEL = maxReplicatesINTELParam; } + uint32_t maxReplicatesALTERA; + DecorationParam(uint32_t maxReplicatesALTERAParam) { maxReplicatesALTERA = maxReplicatesALTERAParam; } operator DecorationAndParamData() { - DecorationAndParamData ret(Decoration::MaxReplicatesINTEL); - ret.maxReplicatesINTEL = maxReplicatesINTEL; + DecorationAndParamData ret(Decoration::MaxReplicatesALTERA); + ret.maxReplicatesALTERA = maxReplicatesALTERA; return ret; } }; template<> -struct DecorationParam +struct DecorationParam { - uint32_t bankBitsINTEL; - DecorationParam(uint32_t bankBitsINTELParam) { bankBitsINTEL = bankBitsINTELParam; } + uint32_t bankBitsALTERA; + DecorationParam(uint32_t bankBitsALTERAParam) { bankBitsALTERA = bankBitsALTERAParam; } operator DecorationAndParamData() { - DecorationAndParamData ret(Decoration::BankBitsINTEL); - ret.bankBitsINTEL = bankBitsINTEL; + DecorationAndParamData ret(Decoration::BankBitsALTERA); + ret.bankBitsALTERA = bankBitsALTERA; return ret; } }; template<> -struct DecorationParam +struct DecorationParam { - uint32_t forcePow2DepthINTEL; - DecorationParam(uint32_t forcePow2DepthINTELParam) { forcePow2DepthINTEL = forcePow2DepthINTELParam; } + uint32_t forcePow2DepthALTERA; + DecorationParam(uint32_t forcePow2DepthALTERAParam) { forcePow2DepthALTERA = forcePow2DepthALTERAParam; } operator DecorationAndParamData() { - DecorationAndParamData ret(Decoration::ForcePow2DepthINTEL); - ret.forcePow2DepthINTEL = forcePow2DepthINTEL; + DecorationAndParamData ret(Decoration::ForcePow2DepthALTERA); + ret.forcePow2DepthALTERA = forcePow2DepthALTERA; return ret; } }; template<> -struct DecorationParam +struct DecorationParam { - uint32_t stridesizeINTEL; - DecorationParam(uint32_t stridesizeINTELParam) { stridesizeINTEL = stridesizeINTELParam; } + uint32_t stridesizeALTERA; + DecorationParam(uint32_t stridesizeALTERAParam) { stridesizeALTERA = stridesizeALTERAParam; } operator DecorationAndParamData() { - DecorationAndParamData ret(Decoration::StridesizeINTEL); - ret.stridesizeINTEL = stridesizeINTEL; + DecorationAndParamData ret(Decoration::StridesizeALTERA); + ret.stridesizeALTERA = stridesizeALTERA; return ret; } }; template<> -struct DecorationParam +struct DecorationParam { - uint32_t wordsizeINTEL; - DecorationParam(uint32_t wordsizeINTELParam) { wordsizeINTEL = wordsizeINTELParam; } + uint32_t wordsizeALTERA; + DecorationParam(uint32_t wordsizeALTERAParam) { wordsizeALTERA = wordsizeALTERAParam; } operator DecorationAndParamData() { - DecorationAndParamData ret(Decoration::WordsizeINTEL); - ret.wordsizeINTEL = wordsizeINTEL; + DecorationAndParamData ret(Decoration::WordsizeALTERA); + ret.wordsizeALTERA = wordsizeALTERA; return ret; } }; template<> -struct DecorationParam +struct DecorationParam { - uint32_t cacheSizeINTEL; - DecorationParam(uint32_t cacheSizeINTELParam) { cacheSizeINTEL = cacheSizeINTELParam; } + uint32_t cacheSizeALTERA; + DecorationParam(uint32_t cacheSizeALTERAParam) { cacheSizeALTERA = cacheSizeALTERAParam; } operator DecorationAndParamData() { - DecorationAndParamData ret(Decoration::CacheSizeINTEL); - ret.cacheSizeINTEL = cacheSizeINTEL; + DecorationAndParamData ret(Decoration::CacheSizeALTERA); + ret.cacheSizeALTERA = cacheSizeALTERA; return ret; } }; template<> -struct DecorationParam +struct DecorationParam { - uint32_t prefetchINTEL; - DecorationParam(uint32_t prefetchINTELParam) { prefetchINTEL = prefetchINTELParam; } + uint32_t prefetchALTERA; + DecorationParam(uint32_t prefetchALTERAParam) { prefetchALTERA = prefetchALTERAParam; } operator DecorationAndParamData() { - DecorationAndParamData ret(Decoration::PrefetchINTEL); - ret.prefetchINTEL = prefetchINTEL; + DecorationAndParamData ret(Decoration::PrefetchALTERA); + ret.prefetchALTERA = prefetchALTERA; return ret; } }; template<> -struct DecorationParam +struct DecorationParam { - MathOpDSPModeINTELParams mathOpDSPModeINTEL; - DecorationParam(uint32_t mode, uint32_t propagate) { mathOpDSPModeINTEL.mode = mode; mathOpDSPModeINTEL.propagate = propagate; } + MathOpDSPModeALTERAParams mathOpDSPModeALTERA; + DecorationParam(uint32_t mode, uint32_t propagate) { mathOpDSPModeALTERA.mode = mode; mathOpDSPModeALTERA.propagate = propagate; } operator DecorationAndParamData() { - DecorationAndParamData ret(Decoration::MathOpDSPModeINTEL); - ret.mathOpDSPModeINTEL.mode = mathOpDSPModeINTEL.mode; - ret.mathOpDSPModeINTEL.propagate = mathOpDSPModeINTEL.propagate; + DecorationAndParamData ret(Decoration::MathOpDSPModeALTERA); + ret.mathOpDSPModeALTERA.mode = mathOpDSPModeALTERA.mode; + ret.mathOpDSPModeALTERA.propagate = mathOpDSPModeALTERA.propagate; return ret; } }; @@ -2126,66 +2120,66 @@ struct DecorationParam }; template<> -struct DecorationParam +struct DecorationParam { - uint32_t initiationIntervalINTEL; - DecorationParam(uint32_t initiationIntervalINTELParam) { initiationIntervalINTEL = initiationIntervalINTELParam; } + uint32_t initiationIntervalALTERA; + DecorationParam(uint32_t initiationIntervalALTERAParam) { initiationIntervalALTERA = initiationIntervalALTERAParam; } operator DecorationAndParamData() { - DecorationAndParamData ret(Decoration::InitiationIntervalINTEL); - ret.initiationIntervalINTEL = initiationIntervalINTEL; + DecorationAndParamData ret(Decoration::InitiationIntervalALTERA); + ret.initiationIntervalALTERA = initiationIntervalALTERA; return ret; } }; template<> -struct DecorationParam +struct DecorationParam { - uint32_t maxConcurrencyINTEL; - DecorationParam(uint32_t maxConcurrencyINTELParam) { maxConcurrencyINTEL = maxConcurrencyINTELParam; } + uint32_t maxConcurrencyALTERA; + DecorationParam(uint32_t maxConcurrencyALTERAParam) { maxConcurrencyALTERA = maxConcurrencyALTERAParam; } operator DecorationAndParamData() { - DecorationAndParamData ret(Decoration::MaxConcurrencyINTEL); - ret.maxConcurrencyINTEL = maxConcurrencyINTEL; + DecorationAndParamData ret(Decoration::MaxConcurrencyALTERA); + ret.maxConcurrencyALTERA = maxConcurrencyALTERA; return ret; } }; template<> -struct DecorationParam +struct DecorationParam { - uint32_t pipelineEnableINTEL; - DecorationParam(uint32_t pipelineEnableINTELParam) { pipelineEnableINTEL = pipelineEnableINTELParam; } + uint32_t pipelineEnableALTERA; + DecorationParam(uint32_t pipelineEnableALTERAParam) { pipelineEnableALTERA = pipelineEnableALTERAParam; } operator DecorationAndParamData() { - DecorationAndParamData ret(Decoration::PipelineEnableINTEL); - ret.pipelineEnableINTEL = pipelineEnableINTEL; + DecorationAndParamData ret(Decoration::PipelineEnableALTERA); + ret.pipelineEnableALTERA = pipelineEnableALTERA; return ret; } }; template<> -struct DecorationParam +struct DecorationParam { - uint32_t bufferLocationINTEL; - DecorationParam(uint32_t bufferLocationINTELParam) { bufferLocationINTEL = bufferLocationINTELParam; } + uint32_t bufferLocationALTERA; + DecorationParam(uint32_t bufferLocationALTERAParam) { bufferLocationALTERA = bufferLocationALTERAParam; } operator DecorationAndParamData() { - DecorationAndParamData ret(Decoration::BufferLocationINTEL); - ret.bufferLocationINTEL = bufferLocationINTEL; + DecorationAndParamData ret(Decoration::BufferLocationALTERA); + ret.bufferLocationALTERA = bufferLocationALTERA; return ret; } }; template<> -struct DecorationParam +struct DecorationParam { - uint32_t iOPipeStorageINTEL; - DecorationParam(uint32_t iOPipeStorageINTELParam) { iOPipeStorageINTEL = iOPipeStorageINTELParam; } + uint32_t iOPipeStorageALTERA; + DecorationParam(uint32_t iOPipeStorageALTERAParam) { iOPipeStorageALTERA = iOPipeStorageALTERAParam; } operator DecorationAndParamData() { - DecorationAndParamData ret(Decoration::IOPipeStorageINTEL); - ret.iOPipeStorageINTEL = iOPipeStorageINTEL; + DecorationAndParamData ret(Decoration::IOPipeStorageALTERA); + ret.iOPipeStorageALTERA = iOPipeStorageALTERA; return ret; } }; @@ -2218,133 +2212,146 @@ struct DecorationParam }; template<> -struct DecorationParam +struct DecorationParam { - uint32_t latencyControlLabelINTEL; - DecorationParam(uint32_t latencyControlLabelINTELParam) { latencyControlLabelINTEL = latencyControlLabelINTELParam; } + uint32_t latencyControlLabelALTERA; + DecorationParam(uint32_t latencyControlLabelALTERAParam) { latencyControlLabelALTERA = latencyControlLabelALTERAParam; } operator DecorationAndParamData() { - DecorationAndParamData ret(Decoration::LatencyControlLabelINTEL); - ret.latencyControlLabelINTEL = latencyControlLabelINTEL; + DecorationAndParamData ret(Decoration::LatencyControlLabelALTERA); + ret.latencyControlLabelALTERA = latencyControlLabelALTERA; return ret; } }; template<> -struct DecorationParam +struct DecorationParam { - LatencyControlConstraintINTELParams latencyControlConstraintINTEL; - DecorationParam(uint32_t relativeTo, uint32_t controlType, uint32_t relativeCycle) { latencyControlConstraintINTEL.relativeTo = relativeTo; latencyControlConstraintINTEL.controlType = controlType; latencyControlConstraintINTEL.relativeCycle = relativeCycle; } + LatencyControlConstraintALTERAParams latencyControlConstraintALTERA; + DecorationParam(uint32_t relativeTo, uint32_t controlType, uint32_t relativeCycle) { latencyControlConstraintALTERA.relativeTo = relativeTo; latencyControlConstraintALTERA.controlType = controlType; latencyControlConstraintALTERA.relativeCycle = relativeCycle; } operator DecorationAndParamData() { - DecorationAndParamData ret(Decoration::LatencyControlConstraintINTEL); - ret.latencyControlConstraintINTEL.relativeTo = latencyControlConstraintINTEL.relativeTo; - ret.latencyControlConstraintINTEL.controlType = latencyControlConstraintINTEL.controlType; - ret.latencyControlConstraintINTEL.relativeCycle = latencyControlConstraintINTEL.relativeCycle; + DecorationAndParamData ret(Decoration::LatencyControlConstraintALTERA); + ret.latencyControlConstraintALTERA.relativeTo = latencyControlConstraintALTERA.relativeTo; + ret.latencyControlConstraintALTERA.controlType = latencyControlConstraintALTERA.controlType; + ret.latencyControlConstraintALTERA.relativeCycle = latencyControlConstraintALTERA.relativeCycle; return ret; } }; template<> -struct DecorationParam +struct DecorationParam { - uint32_t mMHostInterfaceAddressWidthINTEL; - DecorationParam(uint32_t mMHostInterfaceAddressWidthINTELParam) { mMHostInterfaceAddressWidthINTEL = mMHostInterfaceAddressWidthINTELParam; } + uint32_t mMHostInterfaceAddressWidthALTERA; + DecorationParam(uint32_t mMHostInterfaceAddressWidthALTERAParam) { mMHostInterfaceAddressWidthALTERA = mMHostInterfaceAddressWidthALTERAParam; } operator DecorationAndParamData() { - DecorationAndParamData ret(Decoration::MMHostInterfaceAddressWidthINTEL); - ret.mMHostInterfaceAddressWidthINTEL = mMHostInterfaceAddressWidthINTEL; + DecorationAndParamData ret(Decoration::MMHostInterfaceAddressWidthALTERA); + ret.mMHostInterfaceAddressWidthALTERA = mMHostInterfaceAddressWidthALTERA; return ret; } }; template<> -struct DecorationParam +struct DecorationParam { - uint32_t mMHostInterfaceDataWidthINTEL; - DecorationParam(uint32_t mMHostInterfaceDataWidthINTELParam) { mMHostInterfaceDataWidthINTEL = mMHostInterfaceDataWidthINTELParam; } + uint32_t mMHostInterfaceDataWidthALTERA; + DecorationParam(uint32_t mMHostInterfaceDataWidthALTERAParam) { mMHostInterfaceDataWidthALTERA = mMHostInterfaceDataWidthALTERAParam; } operator DecorationAndParamData() { - DecorationAndParamData ret(Decoration::MMHostInterfaceDataWidthINTEL); - ret.mMHostInterfaceDataWidthINTEL = mMHostInterfaceDataWidthINTEL; + DecorationAndParamData ret(Decoration::MMHostInterfaceDataWidthALTERA); + ret.mMHostInterfaceDataWidthALTERA = mMHostInterfaceDataWidthALTERA; return ret; } }; template<> -struct DecorationParam +struct DecorationParam { - uint32_t mMHostInterfaceLatencyINTEL; - DecorationParam(uint32_t mMHostInterfaceLatencyINTELParam) { mMHostInterfaceLatencyINTEL = mMHostInterfaceLatencyINTELParam; } + uint32_t mMHostInterfaceLatencyALTERA; + DecorationParam(uint32_t mMHostInterfaceLatencyALTERAParam) { mMHostInterfaceLatencyALTERA = mMHostInterfaceLatencyALTERAParam; } operator DecorationAndParamData() { - DecorationAndParamData ret(Decoration::MMHostInterfaceLatencyINTEL); - ret.mMHostInterfaceLatencyINTEL = mMHostInterfaceLatencyINTEL; + DecorationAndParamData ret(Decoration::MMHostInterfaceLatencyALTERA); + ret.mMHostInterfaceLatencyALTERA = mMHostInterfaceLatencyALTERA; return ret; } }; template<> -struct DecorationParam +struct DecorationParam { - AccessQualifier mMHostInterfaceReadWriteModeINTEL; - DecorationParam(AccessQualifier mMHostInterfaceReadWriteModeINTELParam) { mMHostInterfaceReadWriteModeINTEL = mMHostInterfaceReadWriteModeINTELParam; } + AccessQualifier mMHostInterfaceReadWriteModeALTERA; + DecorationParam(AccessQualifier mMHostInterfaceReadWriteModeALTERAParam) { mMHostInterfaceReadWriteModeALTERA = mMHostInterfaceReadWriteModeALTERAParam; } operator DecorationAndParamData() { - DecorationAndParamData ret(Decoration::MMHostInterfaceReadWriteModeINTEL); - ret.mMHostInterfaceReadWriteModeINTEL = mMHostInterfaceReadWriteModeINTEL; + DecorationAndParamData ret(Decoration::MMHostInterfaceReadWriteModeALTERA); + ret.mMHostInterfaceReadWriteModeALTERA = mMHostInterfaceReadWriteModeALTERA; return ret; } }; template<> -struct DecorationParam +struct DecorationParam { - uint32_t mMHostInterfaceMaxBurstINTEL; - DecorationParam(uint32_t mMHostInterfaceMaxBurstINTELParam) { mMHostInterfaceMaxBurstINTEL = mMHostInterfaceMaxBurstINTELParam; } + uint32_t mMHostInterfaceMaxBurstALTERA; + DecorationParam(uint32_t mMHostInterfaceMaxBurstALTERAParam) { mMHostInterfaceMaxBurstALTERA = mMHostInterfaceMaxBurstALTERAParam; } operator DecorationAndParamData() { - DecorationAndParamData ret(Decoration::MMHostInterfaceMaxBurstINTEL); - ret.mMHostInterfaceMaxBurstINTEL = mMHostInterfaceMaxBurstINTEL; + DecorationAndParamData ret(Decoration::MMHostInterfaceMaxBurstALTERA); + ret.mMHostInterfaceMaxBurstALTERA = mMHostInterfaceMaxBurstALTERA; return ret; } }; template<> -struct DecorationParam +struct DecorationParam { - uint32_t mMHostInterfaceWaitRequestINTEL; - DecorationParam(uint32_t mMHostInterfaceWaitRequestINTELParam) { mMHostInterfaceWaitRequestINTEL = mMHostInterfaceWaitRequestINTELParam; } + uint32_t mMHostInterfaceWaitRequestALTERA; + DecorationParam(uint32_t mMHostInterfaceWaitRequestALTERAParam) { mMHostInterfaceWaitRequestALTERA = mMHostInterfaceWaitRequestALTERAParam; } operator DecorationAndParamData() { - DecorationAndParamData ret(Decoration::MMHostInterfaceWaitRequestINTEL); - ret.mMHostInterfaceWaitRequestINTEL = mMHostInterfaceWaitRequestINTEL; + DecorationAndParamData ret(Decoration::MMHostInterfaceWaitRequestALTERA); + ret.mMHostInterfaceWaitRequestALTERA = mMHostInterfaceWaitRequestALTERA; return ret; } }; template<> -struct DecorationParam +struct DecorationParam { - InitializationModeQualifier initModeINTEL; - DecorationParam(InitializationModeQualifier initModeINTELParam) { initModeINTEL = initModeINTELParam; } + InitializationModeQualifier initModeALTERA; + DecorationParam(InitializationModeQualifier initModeALTERAParam) { initModeALTERA = initModeALTERAParam; } operator DecorationAndParamData() { - DecorationAndParamData ret(Decoration::InitModeINTEL); - ret.initModeINTEL = initModeINTEL; + DecorationAndParamData ret(Decoration::InitModeALTERA); + ret.initModeALTERA = initModeALTERA; return ret; } }; template<> -struct DecorationParam +struct DecorationParam { - uint32_t implementInRegisterMapINTEL; - DecorationParam(uint32_t implementInRegisterMapINTELParam) { implementInRegisterMapINTEL = implementInRegisterMapINTELParam; } + uint32_t implementInRegisterMapALTERA; + DecorationParam(uint32_t implementInRegisterMapALTERAParam) { implementInRegisterMapALTERA = implementInRegisterMapALTERAParam; } operator DecorationAndParamData() { - DecorationAndParamData ret(Decoration::ImplementInRegisterMapINTEL); - ret.implementInRegisterMapINTEL = implementInRegisterMapINTEL; + DecorationAndParamData ret(Decoration::ImplementInRegisterMapALTERA); + ret.implementInRegisterMapALTERA = implementInRegisterMapALTERA; + return ret; + } +}; + +template<> +struct DecorationParam +{ + Id conditionalINTEL; + DecorationParam(Id conditionalINTELParam) { conditionalINTEL = conditionalINTELParam; } + operator DecorationAndParamData() + { + DecorationAndParamData ret(Decoration::ConditionalINTEL); + ret.conditionalINTEL = conditionalINTEL; return ret; } }; @@ -2526,49 +2533,49 @@ inline DecorationAndParamData DecodeParam(const ConstIter &it, uint32_t &word) ret.functionDenormModeINTEL.fPDenormMode = (FPDenormMode)it.word(word+1); word += 2; break; - case Decoration::NumbanksINTEL: - ret.numbanksINTEL = (uint32_t)it.word(word); + case Decoration::NumbanksALTERA: + ret.numbanksALTERA = (uint32_t)it.word(word); word += 1; break; - case Decoration::BankwidthINTEL: - ret.bankwidthINTEL = (uint32_t)it.word(word); + case Decoration::BankwidthALTERA: + ret.bankwidthALTERA = (uint32_t)it.word(word); word += 1; break; - case Decoration::MaxPrivateCopiesINTEL: - ret.maxPrivateCopiesINTEL = (uint32_t)it.word(word); + case Decoration::MaxPrivateCopiesALTERA: + ret.maxPrivateCopiesALTERA = (uint32_t)it.word(word); word += 1; break; - case Decoration::MaxReplicatesINTEL: - ret.maxReplicatesINTEL = (uint32_t)it.word(word); + case Decoration::MaxReplicatesALTERA: + ret.maxReplicatesALTERA = (uint32_t)it.word(word); word += 1; break; - case Decoration::BankBitsINTEL: - ret.bankBitsINTEL = (uint32_t)it.word(word); + case Decoration::BankBitsALTERA: + ret.bankBitsALTERA = (uint32_t)it.word(word); word += 1; break; - case Decoration::ForcePow2DepthINTEL: - ret.forcePow2DepthINTEL = (uint32_t)it.word(word); + case Decoration::ForcePow2DepthALTERA: + ret.forcePow2DepthALTERA = (uint32_t)it.word(word); word += 1; break; - case Decoration::StridesizeINTEL: - ret.stridesizeINTEL = (uint32_t)it.word(word); + case Decoration::StridesizeALTERA: + ret.stridesizeALTERA = (uint32_t)it.word(word); word += 1; break; - case Decoration::WordsizeINTEL: - ret.wordsizeINTEL = (uint32_t)it.word(word); + case Decoration::WordsizeALTERA: + ret.wordsizeALTERA = (uint32_t)it.word(word); word += 1; break; - case Decoration::CacheSizeINTEL: - ret.cacheSizeINTEL = (uint32_t)it.word(word); + case Decoration::CacheSizeALTERA: + ret.cacheSizeALTERA = (uint32_t)it.word(word); word += 1; break; - case Decoration::PrefetchINTEL: - ret.prefetchINTEL = (uint32_t)it.word(word); + case Decoration::PrefetchALTERA: + ret.prefetchALTERA = (uint32_t)it.word(word); word += 1; break; - case Decoration::MathOpDSPModeINTEL: - ret.mathOpDSPModeINTEL.mode = (uint32_t)it.word(word+0); - ret.mathOpDSPModeINTEL.propagate = (uint32_t)it.word(word+1); + case Decoration::MathOpDSPModeALTERA: + ret.mathOpDSPModeALTERA.mode = (uint32_t)it.word(word+0); + ret.mathOpDSPModeALTERA.propagate = (uint32_t)it.word(word+1); word += 2; break; case Decoration::AliasScopeINTEL: @@ -2579,24 +2586,24 @@ inline DecorationAndParamData DecodeParam(const ConstIter &it, uint32_t &word) ret.noAliasINTEL = Id::fromWord(it.word(word)); word += 1; break; - case Decoration::InitiationIntervalINTEL: - ret.initiationIntervalINTEL = (uint32_t)it.word(word); + case Decoration::InitiationIntervalALTERA: + ret.initiationIntervalALTERA = (uint32_t)it.word(word); word += 1; break; - case Decoration::MaxConcurrencyINTEL: - ret.maxConcurrencyINTEL = (uint32_t)it.word(word); + case Decoration::MaxConcurrencyALTERA: + ret.maxConcurrencyALTERA = (uint32_t)it.word(word); word += 1; break; - case Decoration::PipelineEnableINTEL: - ret.pipelineEnableINTEL = (uint32_t)it.word(word); + case Decoration::PipelineEnableALTERA: + ret.pipelineEnableALTERA = (uint32_t)it.word(word); word += 1; break; - case Decoration::BufferLocationINTEL: - ret.bufferLocationINTEL = (uint32_t)it.word(word); + case Decoration::BufferLocationALTERA: + ret.bufferLocationALTERA = (uint32_t)it.word(word); word += 1; break; - case Decoration::IOPipeStorageINTEL: - ret.iOPipeStorageINTEL = (uint32_t)it.word(word); + case Decoration::IOPipeStorageALTERA: + ret.iOPipeStorageALTERA = (uint32_t)it.word(word); word += 1; break; case Decoration::FunctionFloatingPointModeINTEL: @@ -2608,46 +2615,50 @@ inline DecorationAndParamData DecodeParam(const ConstIter &it, uint32_t &word) ret.fPMaxErrorDecorationINTEL = (float)it.word(word); word += 1; break; - case Decoration::LatencyControlLabelINTEL: - ret.latencyControlLabelINTEL = (uint32_t)it.word(word); + case Decoration::LatencyControlLabelALTERA: + ret.latencyControlLabelALTERA = (uint32_t)it.word(word); word += 1; break; - case Decoration::LatencyControlConstraintINTEL: - ret.latencyControlConstraintINTEL.relativeTo = (uint32_t)it.word(word+0); - ret.latencyControlConstraintINTEL.controlType = (uint32_t)it.word(word+1); - ret.latencyControlConstraintINTEL.relativeCycle = (uint32_t)it.word(word+2); + case Decoration::LatencyControlConstraintALTERA: + ret.latencyControlConstraintALTERA.relativeTo = (uint32_t)it.word(word+0); + ret.latencyControlConstraintALTERA.controlType = (uint32_t)it.word(word+1); + ret.latencyControlConstraintALTERA.relativeCycle = (uint32_t)it.word(word+2); word += 3; break; - case Decoration::MMHostInterfaceAddressWidthINTEL: - ret.mMHostInterfaceAddressWidthINTEL = (uint32_t)it.word(word); + case Decoration::MMHostInterfaceAddressWidthALTERA: + ret.mMHostInterfaceAddressWidthALTERA = (uint32_t)it.word(word); word += 1; break; - case Decoration::MMHostInterfaceDataWidthINTEL: - ret.mMHostInterfaceDataWidthINTEL = (uint32_t)it.word(word); + case Decoration::MMHostInterfaceDataWidthALTERA: + ret.mMHostInterfaceDataWidthALTERA = (uint32_t)it.word(word); word += 1; break; - case Decoration::MMHostInterfaceLatencyINTEL: - ret.mMHostInterfaceLatencyINTEL = (uint32_t)it.word(word); + case Decoration::MMHostInterfaceLatencyALTERA: + ret.mMHostInterfaceLatencyALTERA = (uint32_t)it.word(word); word += 1; break; - case Decoration::MMHostInterfaceReadWriteModeINTEL: - ret.mMHostInterfaceReadWriteModeINTEL = (AccessQualifier)it.word(word); + case Decoration::MMHostInterfaceReadWriteModeALTERA: + ret.mMHostInterfaceReadWriteModeALTERA = (AccessQualifier)it.word(word); word += 1; break; - case Decoration::MMHostInterfaceMaxBurstINTEL: - ret.mMHostInterfaceMaxBurstINTEL = (uint32_t)it.word(word); + case Decoration::MMHostInterfaceMaxBurstALTERA: + ret.mMHostInterfaceMaxBurstALTERA = (uint32_t)it.word(word); word += 1; break; - case Decoration::MMHostInterfaceWaitRequestINTEL: - ret.mMHostInterfaceWaitRequestINTEL = (uint32_t)it.word(word); + case Decoration::MMHostInterfaceWaitRequestALTERA: + ret.mMHostInterfaceWaitRequestALTERA = (uint32_t)it.word(word); word += 1; break; - case Decoration::InitModeINTEL: - ret.initModeINTEL = (InitializationModeQualifier)it.word(word); + case Decoration::InitModeALTERA: + ret.initModeALTERA = (InitializationModeQualifier)it.word(word); word += 1; break; - case Decoration::ImplementInRegisterMapINTEL: - ret.implementInRegisterMapINTEL = (uint32_t)it.word(word); + case Decoration::ImplementInRegisterMapALTERA: + ret.implementInRegisterMapALTERA = (uint32_t)it.word(word); + word += 1; + break; + case Decoration::ConditionalINTEL: + ret.conditionalINTEL = Id::fromWord(it.word(word)); word += 1; break; case Decoration::CacheControlLoadINTEL: @@ -2774,39 +2785,39 @@ inline void EncodeParam(rdcarray &words, const DecorationAndParamData words.push_back((uint32_t)param.functionDenormModeINTEL.targetWidth); words.push_back((uint32_t)param.functionDenormModeINTEL.fPDenormMode); break; - case Decoration::NumbanksINTEL: - words.push_back((uint32_t)param.numbanksINTEL); + case Decoration::NumbanksALTERA: + words.push_back((uint32_t)param.numbanksALTERA); break; - case Decoration::BankwidthINTEL: - words.push_back((uint32_t)param.bankwidthINTEL); + case Decoration::BankwidthALTERA: + words.push_back((uint32_t)param.bankwidthALTERA); break; - case Decoration::MaxPrivateCopiesINTEL: - words.push_back((uint32_t)param.maxPrivateCopiesINTEL); + case Decoration::MaxPrivateCopiesALTERA: + words.push_back((uint32_t)param.maxPrivateCopiesALTERA); break; - case Decoration::MaxReplicatesINTEL: - words.push_back((uint32_t)param.maxReplicatesINTEL); + case Decoration::MaxReplicatesALTERA: + words.push_back((uint32_t)param.maxReplicatesALTERA); break; - case Decoration::BankBitsINTEL: - words.push_back((uint32_t)param.bankBitsINTEL); + case Decoration::BankBitsALTERA: + words.push_back((uint32_t)param.bankBitsALTERA); break; - case Decoration::ForcePow2DepthINTEL: - words.push_back((uint32_t)param.forcePow2DepthINTEL); + case Decoration::ForcePow2DepthALTERA: + words.push_back((uint32_t)param.forcePow2DepthALTERA); break; - case Decoration::StridesizeINTEL: - words.push_back((uint32_t)param.stridesizeINTEL); + case Decoration::StridesizeALTERA: + words.push_back((uint32_t)param.stridesizeALTERA); break; - case Decoration::WordsizeINTEL: - words.push_back((uint32_t)param.wordsizeINTEL); + case Decoration::WordsizeALTERA: + words.push_back((uint32_t)param.wordsizeALTERA); break; - case Decoration::CacheSizeINTEL: - words.push_back((uint32_t)param.cacheSizeINTEL); + case Decoration::CacheSizeALTERA: + words.push_back((uint32_t)param.cacheSizeALTERA); break; - case Decoration::PrefetchINTEL: - words.push_back((uint32_t)param.prefetchINTEL); + case Decoration::PrefetchALTERA: + words.push_back((uint32_t)param.prefetchALTERA); break; - case Decoration::MathOpDSPModeINTEL: - words.push_back((uint32_t)param.mathOpDSPModeINTEL.mode); - words.push_back((uint32_t)param.mathOpDSPModeINTEL.propagate); + case Decoration::MathOpDSPModeALTERA: + words.push_back((uint32_t)param.mathOpDSPModeALTERA.mode); + words.push_back((uint32_t)param.mathOpDSPModeALTERA.propagate); break; case Decoration::AliasScopeINTEL: words.push_back(param.aliasScopeINTEL.value()); @@ -2814,20 +2825,20 @@ inline void EncodeParam(rdcarray &words, const DecorationAndParamData case Decoration::NoAliasINTEL: words.push_back(param.noAliasINTEL.value()); break; - case Decoration::InitiationIntervalINTEL: - words.push_back((uint32_t)param.initiationIntervalINTEL); + case Decoration::InitiationIntervalALTERA: + words.push_back((uint32_t)param.initiationIntervalALTERA); break; - case Decoration::MaxConcurrencyINTEL: - words.push_back((uint32_t)param.maxConcurrencyINTEL); + case Decoration::MaxConcurrencyALTERA: + words.push_back((uint32_t)param.maxConcurrencyALTERA); break; - case Decoration::PipelineEnableINTEL: - words.push_back((uint32_t)param.pipelineEnableINTEL); + case Decoration::PipelineEnableALTERA: + words.push_back((uint32_t)param.pipelineEnableALTERA); break; - case Decoration::BufferLocationINTEL: - words.push_back((uint32_t)param.bufferLocationINTEL); + case Decoration::BufferLocationALTERA: + words.push_back((uint32_t)param.bufferLocationALTERA); break; - case Decoration::IOPipeStorageINTEL: - words.push_back((uint32_t)param.iOPipeStorageINTEL); + case Decoration::IOPipeStorageALTERA: + words.push_back((uint32_t)param.iOPipeStorageALTERA); break; case Decoration::FunctionFloatingPointModeINTEL: words.push_back((uint32_t)param.functionFloatingPointModeINTEL.targetWidth); @@ -2836,37 +2847,40 @@ inline void EncodeParam(rdcarray &words, const DecorationAndParamData case Decoration::FPMaxErrorDecorationINTEL: words.push_back((uint32_t)param.fPMaxErrorDecorationINTEL); break; - case Decoration::LatencyControlLabelINTEL: - words.push_back((uint32_t)param.latencyControlLabelINTEL); + case Decoration::LatencyControlLabelALTERA: + words.push_back((uint32_t)param.latencyControlLabelALTERA); break; - case Decoration::LatencyControlConstraintINTEL: - words.push_back((uint32_t)param.latencyControlConstraintINTEL.relativeTo); - words.push_back((uint32_t)param.latencyControlConstraintINTEL.controlType); - words.push_back((uint32_t)param.latencyControlConstraintINTEL.relativeCycle); + case Decoration::LatencyControlConstraintALTERA: + words.push_back((uint32_t)param.latencyControlConstraintALTERA.relativeTo); + words.push_back((uint32_t)param.latencyControlConstraintALTERA.controlType); + words.push_back((uint32_t)param.latencyControlConstraintALTERA.relativeCycle); break; - case Decoration::MMHostInterfaceAddressWidthINTEL: - words.push_back((uint32_t)param.mMHostInterfaceAddressWidthINTEL); + case Decoration::MMHostInterfaceAddressWidthALTERA: + words.push_back((uint32_t)param.mMHostInterfaceAddressWidthALTERA); break; - case Decoration::MMHostInterfaceDataWidthINTEL: - words.push_back((uint32_t)param.mMHostInterfaceDataWidthINTEL); + case Decoration::MMHostInterfaceDataWidthALTERA: + words.push_back((uint32_t)param.mMHostInterfaceDataWidthALTERA); break; - case Decoration::MMHostInterfaceLatencyINTEL: - words.push_back((uint32_t)param.mMHostInterfaceLatencyINTEL); + case Decoration::MMHostInterfaceLatencyALTERA: + words.push_back((uint32_t)param.mMHostInterfaceLatencyALTERA); break; - case Decoration::MMHostInterfaceReadWriteModeINTEL: - words.push_back((uint32_t)param.mMHostInterfaceReadWriteModeINTEL); + case Decoration::MMHostInterfaceReadWriteModeALTERA: + words.push_back((uint32_t)param.mMHostInterfaceReadWriteModeALTERA); break; - case Decoration::MMHostInterfaceMaxBurstINTEL: - words.push_back((uint32_t)param.mMHostInterfaceMaxBurstINTEL); + case Decoration::MMHostInterfaceMaxBurstALTERA: + words.push_back((uint32_t)param.mMHostInterfaceMaxBurstALTERA); break; - case Decoration::MMHostInterfaceWaitRequestINTEL: - words.push_back((uint32_t)param.mMHostInterfaceWaitRequestINTEL); + case Decoration::MMHostInterfaceWaitRequestALTERA: + words.push_back((uint32_t)param.mMHostInterfaceWaitRequestALTERA); break; - case Decoration::InitModeINTEL: - words.push_back((uint32_t)param.initModeINTEL); + case Decoration::InitModeALTERA: + words.push_back((uint32_t)param.initModeALTERA); break; - case Decoration::ImplementInRegisterMapINTEL: - words.push_back((uint32_t)param.implementInRegisterMapINTEL); + case Decoration::ImplementInRegisterMapALTERA: + words.push_back((uint32_t)param.implementInRegisterMapALTERA); + break; + case Decoration::ConditionalINTEL: + words.push_back(param.conditionalINTEL.value()); break; case Decoration::CacheControlLoadINTEL: words.push_back((uint32_t)param.cacheControlLoadINTEL.cacheLevel); @@ -2918,36 +2932,37 @@ inline uint16_t ExtraWordCount(const Decoration decoration) case Decoration::CounterBuffer: return 1; case Decoration::FunctionRoundingModeINTEL: return 2; case Decoration::FunctionDenormModeINTEL: return 2; - case Decoration::NumbanksINTEL: return 1; - case Decoration::BankwidthINTEL: return 1; - case Decoration::MaxPrivateCopiesINTEL: return 1; - case Decoration::MaxReplicatesINTEL: return 1; - case Decoration::BankBitsINTEL: return 1; - case Decoration::ForcePow2DepthINTEL: return 1; - case Decoration::StridesizeINTEL: return 1; - case Decoration::WordsizeINTEL: return 1; - case Decoration::CacheSizeINTEL: return 1; - case Decoration::PrefetchINTEL: return 1; - case Decoration::MathOpDSPModeINTEL: return 2; + case Decoration::NumbanksALTERA: return 1; + case Decoration::BankwidthALTERA: return 1; + case Decoration::MaxPrivateCopiesALTERA: return 1; + case Decoration::MaxReplicatesALTERA: return 1; + case Decoration::BankBitsALTERA: return 1; + case Decoration::ForcePow2DepthALTERA: return 1; + case Decoration::StridesizeALTERA: return 1; + case Decoration::WordsizeALTERA: return 1; + case Decoration::CacheSizeALTERA: return 1; + case Decoration::PrefetchALTERA: return 1; + case Decoration::MathOpDSPModeALTERA: return 2; case Decoration::AliasScopeINTEL: return 1; case Decoration::NoAliasINTEL: return 1; - case Decoration::InitiationIntervalINTEL: return 1; - case Decoration::MaxConcurrencyINTEL: return 1; - case Decoration::PipelineEnableINTEL: return 1; - case Decoration::BufferLocationINTEL: return 1; - case Decoration::IOPipeStorageINTEL: return 1; + case Decoration::InitiationIntervalALTERA: return 1; + case Decoration::MaxConcurrencyALTERA: return 1; + case Decoration::PipelineEnableALTERA: return 1; + case Decoration::BufferLocationALTERA: return 1; + case Decoration::IOPipeStorageALTERA: return 1; case Decoration::FunctionFloatingPointModeINTEL: return 2; case Decoration::FPMaxErrorDecorationINTEL: return 1; - case Decoration::LatencyControlLabelINTEL: return 1; - case Decoration::LatencyControlConstraintINTEL: return 3; - case Decoration::MMHostInterfaceAddressWidthINTEL: return 1; - case Decoration::MMHostInterfaceDataWidthINTEL: return 1; - case Decoration::MMHostInterfaceLatencyINTEL: return 1; - case Decoration::MMHostInterfaceReadWriteModeINTEL: return 1; - case Decoration::MMHostInterfaceMaxBurstINTEL: return 1; - case Decoration::MMHostInterfaceWaitRequestINTEL: return 1; - case Decoration::InitModeINTEL: return 1; - case Decoration::ImplementInRegisterMapINTEL: return 1; + case Decoration::LatencyControlLabelALTERA: return 1; + case Decoration::LatencyControlConstraintALTERA: return 3; + case Decoration::MMHostInterfaceAddressWidthALTERA: return 1; + case Decoration::MMHostInterfaceDataWidthALTERA: return 1; + case Decoration::MMHostInterfaceLatencyALTERA: return 1; + case Decoration::MMHostInterfaceReadWriteModeALTERA: return 1; + case Decoration::MMHostInterfaceMaxBurstALTERA: return 1; + case Decoration::MMHostInterfaceWaitRequestALTERA: return 1; + case Decoration::InitModeALTERA: return 1; + case Decoration::ImplementInRegisterMapALTERA: return 1; + case Decoration::ConditionalINTEL: return 1; case Decoration::CacheControlLoadINTEL: return 2; case Decoration::CacheControlStoreINTEL: return 2; default: break; @@ -12092,7 +12107,7 @@ struct OpGroupNonUniformBroadcast { memcpy(this, it.words(), sizeof(*this)); } - OpGroupNonUniformBroadcast(IdResultType resultType, IdResult result, IdScope execution, Id value, Id id) + OpGroupNonUniformBroadcast(IdResultType resultType, IdResult result, IdScope execution, Id value, Id invocationId) : op(Op::GroupNonUniformBroadcast) , wordCount(FixedWordSize) { @@ -12100,7 +12115,7 @@ struct OpGroupNonUniformBroadcast this->result = result; this->execution = execution; this->value = value; - this->id = id; + this->invocationId = invocationId; } static constexpr Op OpCode = Op::GroupNonUniformBroadcast; @@ -12111,7 +12126,7 @@ struct OpGroupNonUniformBroadcast IdResult result; IdScope execution; Id value; - Id id; + Id invocationId; }; struct OpGroupNonUniformBroadcastFirst @@ -12306,7 +12321,7 @@ struct OpGroupNonUniformShuffle { memcpy(this, it.words(), sizeof(*this)); } - OpGroupNonUniformShuffle(IdResultType resultType, IdResult result, IdScope execution, Id value, Id id) + OpGroupNonUniformShuffle(IdResultType resultType, IdResult result, IdScope execution, Id value, Id invocationId) : op(Op::GroupNonUniformShuffle) , wordCount(FixedWordSize) { @@ -12314,7 +12329,7 @@ struct OpGroupNonUniformShuffle this->result = result; this->execution = execution; this->value = value; - this->id = id; + this->invocationId = invocationId; } static constexpr Op OpCode = Op::GroupNonUniformShuffle; @@ -12325,7 +12340,7 @@ struct OpGroupNonUniformShuffle IdResult result; IdScope execution; Id value; - Id id; + Id invocationId; }; struct OpGroupNonUniformShuffleXor @@ -13665,6 +13680,240 @@ struct OpTensorQuerySizeARM Id dimension; }; +struct OpGraphConstantARM +{ + OpGraphConstantARM(const ConstIter &it) + { + memcpy(this, it.words(), sizeof(*this)); + } + OpGraphConstantARM(IdResultType resultType, IdResult result, uint32_t graphConstantID) + : op(Op::GraphConstantARM) + , wordCount(FixedWordSize) + { + this->resultType = resultType; + this->result = result; + this->graphConstantID = graphConstantID; + } + + static constexpr Op OpCode = Op::GraphConstantARM; + static constexpr uint16_t FixedWordSize = 4U; + Op op; + uint16_t wordCount; + IdResultType resultType; + IdResult result; + uint32_t graphConstantID; +}; + +struct OpGraphEntryPointARM +{ + OpGraphEntryPointARM(const ConstIter &it) + { + uint32_t word = 0;(void)word; + this->op = OpCode; + this->wordCount = (uint16_t)it.size(); + this->graph = Id::fromWord(it.word(1)); + word = 2; + this->name = DecodeParam(it, word); + this->iface = MultiParam(it, word); + } + OpGraphEntryPointARM(Id graph, rdcstr name, const rdcarray &iface = {}) + : op(Op::GraphEntryPointARM) + , wordCount(MinWordSize + ExtraWordCount(name) + MultiWordCount(iface)) + { + this->graph = graph; + this->name = name; + this->iface = iface; + } + operator Operation() const + { + rdcarray words; + words.push_back(graph.value()); + EncodeParam(words, name); + for(size_t i=0; i < iface.size(); i++) + { + words.push_back(iface[i].value()); + } + return Operation(OpCode, words); + } + + static constexpr Op OpCode = Op::GraphEntryPointARM; + static constexpr uint16_t MinWordSize = 3U; + Op op; + uint16_t wordCount; + Id graph; + rdcstr name; + rdcarray iface; +}; + +struct OpGraphARM +{ + OpGraphARM(const ConstIter &it) + { + memcpy(this, it.words(), sizeof(*this)); + } + OpGraphARM(IdResultType resultType, IdResult result) + : op(Op::GraphARM) + , wordCount(FixedWordSize) + { + this->resultType = resultType; + this->result = result; + } + + static constexpr Op OpCode = Op::GraphARM; + static constexpr uint16_t FixedWordSize = 3U; + Op op; + uint16_t wordCount; + IdResultType resultType; + IdResult result; +}; + +struct OpGraphInputARM +{ + OpGraphInputARM(const ConstIter &it) + { + uint32_t word = 0;(void)word; + this->op = OpCode; + this->wordCount = (uint16_t)it.size(); + this->resultType = Id::fromWord(it.word(1)); + this->result = Id::fromWord(it.word(2)); + this->inputIndex = Id::fromWord(it.word(3)); + word = 4; + this->elementIndex = MultiParam(it, word); + } + OpGraphInputARM(IdResultType resultType, IdResult result, Id inputIndex, const rdcarray &elementIndex = {}) + : op(Op::GraphInputARM) + , wordCount(MinWordSize + MultiWordCount(elementIndex)) + { + this->resultType = resultType; + this->result = result; + this->inputIndex = inputIndex; + this->elementIndex = elementIndex; + } + operator Operation() const + { + rdcarray words; + words.push_back(resultType.value()); + words.push_back(result.value()); + words.push_back(inputIndex.value()); + for(size_t i=0; i < elementIndex.size(); i++) + { + words.push_back(elementIndex[i].value()); + } + return Operation(OpCode, words); + } + + static constexpr Op OpCode = Op::GraphInputARM; + static constexpr uint16_t MinWordSize = 4U; + Op op; + uint16_t wordCount; + IdResultType resultType; + IdResult result; + Id inputIndex; + rdcarray elementIndex; +}; + +struct OpGraphSetOutputARM +{ + OpGraphSetOutputARM(const ConstIter &it) + { + uint32_t word = 0;(void)word; + this->op = OpCode; + this->wordCount = (uint16_t)it.size(); + this->value = Id::fromWord(it.word(1)); + this->outputIndex = Id::fromWord(it.word(2)); + word = 3; + this->elementIndex = MultiParam(it, word); + } + OpGraphSetOutputARM(Id value, Id outputIndex, const rdcarray &elementIndex = {}) + : op(Op::GraphSetOutputARM) + , wordCount(MinWordSize + MultiWordCount(elementIndex)) + { + this->value = value; + this->outputIndex = outputIndex; + this->elementIndex = elementIndex; + } + operator Operation() const + { + rdcarray words; + words.push_back(value.value()); + words.push_back(outputIndex.value()); + for(size_t i=0; i < elementIndex.size(); i++) + { + words.push_back(elementIndex[i].value()); + } + return Operation(OpCode, words); + } + + static constexpr Op OpCode = Op::GraphSetOutputARM; + static constexpr uint16_t MinWordSize = 3U; + Op op; + uint16_t wordCount; + Id value; + Id outputIndex; + rdcarray elementIndex; +}; + +struct OpGraphEndARM +{ + OpGraphEndARM(const ConstIter &it) + { + memcpy(this, it.words(), sizeof(*this)); + } + OpGraphEndARM() + : op(Op::GraphEndARM) + , wordCount(FixedWordSize) + { + // no operands + } + + static constexpr Op OpCode = Op::GraphEndARM; + static constexpr uint16_t FixedWordSize = 1U; + Op op; + uint16_t wordCount; + // no operands +}; + +struct OpTypeGraphARM +{ + OpTypeGraphARM(const ConstIter &it) + { + uint32_t word = 0;(void)word; + this->op = OpCode; + this->wordCount = (uint16_t)it.size(); + this->result = Id::fromWord(it.word(1)); + this->numInputs = (uint32_t)it.word(2); + word = 3; + this->inOutTypes = MultiParam(it, word); + } + OpTypeGraphARM(IdResult result, uint32_t numInputs, const rdcarray &inOutTypes = {}) + : op(Op::TypeGraphARM) + , wordCount(MinWordSize + MultiWordCount(inOutTypes)) + { + this->result = result; + this->numInputs = numInputs; + this->inOutTypes = inOutTypes; + } + operator Operation() const + { + rdcarray words; + words.push_back(result.value()); + words.push_back((uint32_t)numInputs); + for(size_t i=0; i < inOutTypes.size(); i++) + { + words.push_back(inOutTypes[i].value()); + } + return Operation(OpCode, words); + } + + static constexpr Op OpCode = Op::TypeGraphARM; + static constexpr uint16_t MinWordSize = 3U; + Op op; + uint16_t wordCount; + IdResult result; + uint32_t numInputs; + rdcarray inOutTypes; +}; + struct OpTerminateInvocation { OpTerminateInvocation(const ConstIter &it) @@ -14084,6 +14333,34 @@ struct OpUntypedPrefetchKHR bool HasCacheType() const { return wordCount > 5; } }; +struct OpFmaKHR +{ + OpFmaKHR(const ConstIter &it) + { + memcpy(this, it.words(), sizeof(*this)); + } + OpFmaKHR(IdResultType resultType, IdResult result, Id operand1, Id operand2, Id operand3) + : op(Op::FmaKHR) + , wordCount(FixedWordSize) + { + this->resultType = resultType; + this->result = result; + this->operand1 = operand1; + this->operand2 = operand2; + this->operand3 = operand3; + } + + static constexpr Op OpCode = Op::FmaKHR; + static constexpr uint16_t FixedWordSize = 6U; + Op op; + uint16_t wordCount; + IdResultType resultType; + IdResult result; + Id operand1; + Id operand2; + Id operand3; +}; + struct OpSubgroupAllKHR { OpSubgroupAllKHR(const ConstIter &it) @@ -14235,6 +14512,76 @@ struct OpSubgroupReadInvocationKHR struct OpExtInstWithForwardRefsKHR; // has operands with variable sizes +struct OpUntypedGroupAsyncCopyKHR +{ + OpUntypedGroupAsyncCopyKHR(const ConstIter &it) + { + uint32_t word = 0;(void)word; + this->op = OpCode; + this->wordCount = (uint16_t)it.size(); + this->resultType = Id::fromWord(it.word(1)); + this->result = Id::fromWord(it.word(2)); + this->execution = Id::fromWord(it.word(3)); + this->destination = Id::fromWord(it.word(4)); + this->source = Id::fromWord(it.word(5)); + this->elementNumBytes = Id::fromWord(it.word(6)); + this->numElements = Id::fromWord(it.word(7)); + this->stride = Id::fromWord(it.word(8)); + this->event = Id::fromWord(it.word(9)); + word = 10; + this->destinationMemoryOperands = DecodeParam(it, word); + this->sourceMemoryOperands = DecodeParam(it, word); + } + OpUntypedGroupAsyncCopyKHR(IdResultType resultType, IdResult result, Id execution, Id destination, Id source, Id elementNumBytes, Id numElements, Id stride, Id event, MemoryAccessAndParamDatas destinationMemoryOperands = MemoryAccess::None, MemoryAccessAndParamDatas sourceMemoryOperands = MemoryAccess::None) + : op(Op::UntypedGroupAsyncCopyKHR) + , wordCount(MinWordSize + ExtraWordCount(destinationMemoryOperands) + ExtraWordCount(sourceMemoryOperands)) + { + this->resultType = resultType; + this->result = result; + this->execution = execution; + this->destination = destination; + this->source = source; + this->elementNumBytes = elementNumBytes; + this->numElements = numElements; + this->stride = stride; + this->event = event; + this->destinationMemoryOperands = destinationMemoryOperands; + this->sourceMemoryOperands = sourceMemoryOperands; + } + operator Operation() const + { + rdcarray words; + words.push_back(resultType.value()); + words.push_back(result.value()); + words.push_back(execution.value()); + words.push_back(destination.value()); + words.push_back(source.value()); + words.push_back(elementNumBytes.value()); + words.push_back(numElements.value()); + words.push_back(stride.value()); + words.push_back(event.value()); + EncodeParam(words, destinationMemoryOperands); + EncodeParam(words, sourceMemoryOperands); + return Operation(OpCode, words); + } + + static constexpr Op OpCode = Op::UntypedGroupAsyncCopyKHR; + static constexpr uint16_t MinWordSize = 10U; + Op op; + uint16_t wordCount; + IdResultType resultType; + IdResult result; + Id execution; + Id destination; + Id source; + Id elementNumBytes; + Id numElements; + Id stride; + Id event; + MemoryAccessAndParamDatas destinationMemoryOperands; + MemoryAccessAndParamDatas sourceMemoryOperands; +}; + struct OpTraceRayKHR { OpTraceRayKHR(const ConstIter &it) @@ -15216,6 +15563,30 @@ struct OpImageBlockMatchSADQCOM Id blockSize; }; +struct OpBitCastArrayQCOM +{ + OpBitCastArrayQCOM(const ConstIter &it) + { + memcpy(this, it.words(), sizeof(*this)); + } + OpBitCastArrayQCOM(IdResultType resultType, IdResult result, Id sourceArray) + : op(Op::BitCastArrayQCOM) + , wordCount(FixedWordSize) + { + this->resultType = resultType; + this->result = result; + this->sourceArray = sourceArray; + } + + static constexpr Op OpCode = Op::BitCastArrayQCOM; + static constexpr uint16_t FixedWordSize = 4U; + Op op; + uint16_t wordCount; + IdResultType resultType; + IdResult result; + Id sourceArray; +}; + struct OpImageBlockMatchWindowSSDQCOM { OpImageBlockMatchWindowSSDQCOM(const ConstIter &it) @@ -15344,6 +15715,80 @@ struct OpImageBlockMatchGatherSADQCOM Id blockSize; }; +struct OpCompositeConstructCoopMatQCOM +{ + OpCompositeConstructCoopMatQCOM(const ConstIter &it) + { + memcpy(this, it.words(), sizeof(*this)); + } + OpCompositeConstructCoopMatQCOM(IdResultType resultType, IdResult result, Id sourceArray) + : op(Op::CompositeConstructCoopMatQCOM) + , wordCount(FixedWordSize) + { + this->resultType = resultType; + this->result = result; + this->sourceArray = sourceArray; + } + + static constexpr Op OpCode = Op::CompositeConstructCoopMatQCOM; + static constexpr uint16_t FixedWordSize = 4U; + Op op; + uint16_t wordCount; + IdResultType resultType; + IdResult result; + Id sourceArray; +}; + +struct OpCompositeExtractCoopMatQCOM +{ + OpCompositeExtractCoopMatQCOM(const ConstIter &it) + { + memcpy(this, it.words(), sizeof(*this)); + } + OpCompositeExtractCoopMatQCOM(IdResultType resultType, IdResult result, Id sourceCooperativeMatrix) + : op(Op::CompositeExtractCoopMatQCOM) + , wordCount(FixedWordSize) + { + this->resultType = resultType; + this->result = result; + this->sourceCooperativeMatrix = sourceCooperativeMatrix; + } + + static constexpr Op OpCode = Op::CompositeExtractCoopMatQCOM; + static constexpr uint16_t FixedWordSize = 4U; + Op op; + uint16_t wordCount; + IdResultType resultType; + IdResult result; + Id sourceCooperativeMatrix; +}; + +struct OpExtractSubArrayQCOM +{ + OpExtractSubArrayQCOM(const ConstIter &it) + { + memcpy(this, it.words(), sizeof(*this)); + } + OpExtractSubArrayQCOM(IdResultType resultType, IdResult result, Id sourceArray, Id index) + : op(Op::ExtractSubArrayQCOM) + , wordCount(FixedWordSize) + { + this->resultType = resultType; + this->result = result; + this->sourceArray = sourceArray; + this->index = index; + } + + static constexpr Op OpCode = Op::ExtractSubArrayQCOM; + static constexpr uint16_t FixedWordSize = 5U; + Op op; + uint16_t wordCount; + IdResultType resultType; + IdResult result; + Id sourceArray; + Id index; +}; + struct OpGroupIAddNonUniformAMD { OpGroupIAddNonUniformAMD(const ConstIter &it) @@ -17706,14 +18151,14 @@ struct OpExecuteCallableNV Id callableDataId; }; -struct OpRayQueryGetClusterIdNV +struct OpRayQueryGetIntersectionClusterIdNV { - OpRayQueryGetClusterIdNV(const ConstIter &it) + OpRayQueryGetIntersectionClusterIdNV(const ConstIter &it) { memcpy(this, it.words(), sizeof(*this)); } - OpRayQueryGetClusterIdNV(IdResultType resultType, IdResult result, Id rayQuery, Id intersection) - : op(Op::RayQueryGetClusterIdNV) + OpRayQueryGetIntersectionClusterIdNV(IdResultType resultType, IdResult result, Id rayQuery, Id intersection) + : op(Op::RayQueryGetIntersectionClusterIdNV) , wordCount(FixedWordSize) { this->resultType = resultType; @@ -17722,7 +18167,7 @@ struct OpRayQueryGetClusterIdNV this->intersection = intersection; } - static constexpr Op OpCode = Op::RayQueryGetClusterIdNV; + static constexpr Op OpCode = Op::RayQueryGetIntersectionClusterIdNV; static constexpr uint16_t FixedWordSize = 5U; Op op; uint16_t wordCount; @@ -20001,6 +20446,72 @@ struct OpMemberDecorateString DecorationAndParamData decoration; }; +struct OpVariableLengthArrayINTEL +{ + OpVariableLengthArrayINTEL(const ConstIter &it) + { + memcpy(this, it.words(), sizeof(*this)); + } + OpVariableLengthArrayINTEL(IdResultType resultType, IdResult result, Id length) + : op(Op::VariableLengthArrayINTEL) + , wordCount(FixedWordSize) + { + this->resultType = resultType; + this->result = result; + this->length = length; + } + + static constexpr Op OpCode = Op::VariableLengthArrayINTEL; + static constexpr uint16_t FixedWordSize = 4U; + Op op; + uint16_t wordCount; + IdResultType resultType; + IdResult result; + Id length; +}; + +struct OpSaveMemoryINTEL +{ + OpSaveMemoryINTEL(const ConstIter &it) + { + memcpy(this, it.words(), sizeof(*this)); + } + OpSaveMemoryINTEL(IdResultType resultType, IdResult result) + : op(Op::SaveMemoryINTEL) + , wordCount(FixedWordSize) + { + this->resultType = resultType; + this->result = result; + } + + static constexpr Op OpCode = Op::SaveMemoryINTEL; + static constexpr uint16_t FixedWordSize = 3U; + Op op; + uint16_t wordCount; + IdResultType resultType; + IdResult result; +}; + +struct OpRestoreMemoryINTEL +{ + OpRestoreMemoryINTEL(const ConstIter &it) + { + memcpy(this, it.words(), sizeof(*this)); + } + OpRestoreMemoryINTEL(Id ptr) + : op(Op::RestoreMemoryINTEL) + , wordCount(FixedWordSize) + { + this->ptr = ptr; + } + + static constexpr Op OpCode = Op::RestoreMemoryINTEL; + static constexpr uint16_t FixedWordSize = 2U; + Op op; + uint16_t wordCount; + Id ptr; +}; + struct OpLoopControlINTEL { OpLoopControlINTEL(const ConstIter &it) @@ -20034,82 +20545,6 @@ struct OpLoopControlINTEL rdcarray loopControlParameters; }; -struct OpReadPipeBlockingINTEL -{ - OpReadPipeBlockingINTEL(const ConstIter &it) - { - memcpy(this, it.words(), sizeof(*this)); - } - OpReadPipeBlockingINTEL(IdResultType resultType, IdResult result, Id packetSize, Id packetAlignment) - : op(Op::ReadPipeBlockingINTEL) - , wordCount(FixedWordSize) - { - this->resultType = resultType; - this->result = result; - this->packetSize = packetSize; - this->packetAlignment = packetAlignment; - } - - static constexpr Op OpCode = Op::ReadPipeBlockingINTEL; - static constexpr uint16_t FixedWordSize = 5U; - Op op; - uint16_t wordCount; - IdResultType resultType; - IdResult result; - Id packetSize; - Id packetAlignment; -}; - -struct OpWritePipeBlockingINTEL -{ - OpWritePipeBlockingINTEL(const ConstIter &it) - { - memcpy(this, it.words(), sizeof(*this)); - } - OpWritePipeBlockingINTEL(IdResultType resultType, IdResult result, Id packetSize, Id packetAlignment) - : op(Op::WritePipeBlockingINTEL) - , wordCount(FixedWordSize) - { - this->resultType = resultType; - this->result = result; - this->packetSize = packetSize; - this->packetAlignment = packetAlignment; - } - - static constexpr Op OpCode = Op::WritePipeBlockingINTEL; - static constexpr uint16_t FixedWordSize = 5U; - Op op; - uint16_t wordCount; - IdResultType resultType; - IdResult result; - Id packetSize; - Id packetAlignment; -}; - -struct OpFPGARegINTEL -{ - OpFPGARegINTEL(const ConstIter &it) - { - memcpy(this, it.words(), sizeof(*this)); - } - OpFPGARegINTEL(IdResultType resultType, IdResult result, Id input) - : op(Op::FPGARegINTEL) - , wordCount(FixedWordSize) - { - this->resultType = resultType; - this->result = result; - this->input = input; - } - - static constexpr Op OpCode = Op::FPGARegINTEL; - static constexpr uint16_t FixedWordSize = 4U; - Op op; - uint16_t wordCount; - IdResultType resultType; - IdResult result; - Id input; -}; - struct OpRayQueryGetRayTMinKHR { OpRayQueryGetRayTMinKHR(const ConstIter &it) @@ -20854,139 +21289,6 @@ struct OpArithmeticFenceEXT Id target; }; -struct OpTaskSequenceCreateINTEL -{ - OpTaskSequenceCreateINTEL(const ConstIter &it) - { - memcpy(this, it.words(), sizeof(*this)); - } - OpTaskSequenceCreateINTEL(IdResultType resultType, IdResult result, Id function, uint32_t pipelined, uint32_t useStallEnableClusters, uint32_t getCapacity, uint32_t asyncCapacity) - : op(Op::TaskSequenceCreateINTEL) - , wordCount(FixedWordSize) - { - this->resultType = resultType; - this->result = result; - this->function = function; - this->pipelined = pipelined; - this->useStallEnableClusters = useStallEnableClusters; - this->getCapacity = getCapacity; - this->asyncCapacity = asyncCapacity; - } - - static constexpr Op OpCode = Op::TaskSequenceCreateINTEL; - static constexpr uint16_t FixedWordSize = 8U; - Op op; - uint16_t wordCount; - IdResultType resultType; - IdResult result; - Id function; - uint32_t pipelined; - uint32_t useStallEnableClusters; - uint32_t getCapacity; - uint32_t asyncCapacity; -}; - -struct OpTaskSequenceAsyncINTEL -{ - OpTaskSequenceAsyncINTEL(const ConstIter &it) - { - uint32_t word = 0;(void)word; - this->op = OpCode; - this->wordCount = (uint16_t)it.size(); - this->sequence = Id::fromWord(it.word(1)); - word = 2; - this->arguments = MultiParam(it, word); - } - OpTaskSequenceAsyncINTEL(Id sequence, const rdcarray &arguments = {}) - : op(Op::TaskSequenceAsyncINTEL) - , wordCount(MinWordSize + MultiWordCount(arguments)) - { - this->sequence = sequence; - this->arguments = arguments; - } - operator Operation() const - { - rdcarray words; - words.push_back(sequence.value()); - for(size_t i=0; i < arguments.size(); i++) - { - words.push_back(arguments[i].value()); - } - return Operation(OpCode, words); - } - - static constexpr Op OpCode = Op::TaskSequenceAsyncINTEL; - static constexpr uint16_t MinWordSize = 2U; - Op op; - uint16_t wordCount; - Id sequence; - rdcarray arguments; -}; - -struct OpTaskSequenceGetINTEL -{ - OpTaskSequenceGetINTEL(const ConstIter &it) - { - memcpy(this, it.words(), sizeof(*this)); - } - OpTaskSequenceGetINTEL(IdResultType resultType, IdResult result, Id sequence) - : op(Op::TaskSequenceGetINTEL) - , wordCount(FixedWordSize) - { - this->resultType = resultType; - this->result = result; - this->sequence = sequence; - } - - static constexpr Op OpCode = Op::TaskSequenceGetINTEL; - static constexpr uint16_t FixedWordSize = 4U; - Op op; - uint16_t wordCount; - IdResultType resultType; - IdResult result; - Id sequence; -}; - -struct OpTaskSequenceReleaseINTEL -{ - OpTaskSequenceReleaseINTEL(const ConstIter &it) - { - memcpy(this, it.words(), sizeof(*this)); - } - OpTaskSequenceReleaseINTEL(Id sequence) - : op(Op::TaskSequenceReleaseINTEL) - , wordCount(FixedWordSize) - { - this->sequence = sequence; - } - - static constexpr Op OpCode = Op::TaskSequenceReleaseINTEL; - static constexpr uint16_t FixedWordSize = 2U; - Op op; - uint16_t wordCount; - Id sequence; -}; - -struct OpTypeTaskSequenceINTEL -{ - OpTypeTaskSequenceINTEL(const ConstIter &it) - { - memcpy(this, it.words(), sizeof(*this)); - } - OpTypeTaskSequenceINTEL(IdResult result) - : op(Op::TypeTaskSequenceINTEL) - , wordCount(FixedWordSize) - { - this->result = result; - } - - static constexpr Op OpCode = Op::TypeTaskSequenceINTEL; - static constexpr uint16_t FixedWordSize = 2U; - Op op; - uint16_t wordCount; - IdResult result; -}; - struct OpSubgroupBlockPrefetchINTEL { OpSubgroupBlockPrefetchINTEL(const ConstIter &it) @@ -21298,6 +21600,294 @@ struct OpBitwiseFunctionINTEL Id lUTIndex; }; +struct OpUntypedVariableLengthArrayINTEL +{ + OpUntypedVariableLengthArrayINTEL(const ConstIter &it) + { + memcpy(this, it.words(), sizeof(*this)); + } + OpUntypedVariableLengthArrayINTEL(IdResultType resultType, IdResult result, Id elementType, Id length) + : op(Op::UntypedVariableLengthArrayINTEL) + , wordCount(FixedWordSize) + { + this->resultType = resultType; + this->result = result; + this->elementType = elementType; + this->length = length; + } + + static constexpr Op OpCode = Op::UntypedVariableLengthArrayINTEL; + static constexpr uint16_t FixedWordSize = 5U; + Op op; + uint16_t wordCount; + IdResultType resultType; + IdResult result; + Id elementType; + Id length; +}; + +struct OpConditionalExtensionINTEL +{ + OpConditionalExtensionINTEL(const ConstIter &it) + { + uint32_t word = 0;(void)word; + this->op = OpCode; + this->wordCount = (uint16_t)it.size(); + this->condition = Id::fromWord(it.word(1)); + word = 2; + this->name = DecodeParam(it, word); + } + OpConditionalExtensionINTEL(Id condition, rdcstr name) + : op(Op::ConditionalExtensionINTEL) + , wordCount(MinWordSize + ExtraWordCount(name)) + { + this->condition = condition; + this->name = name; + } + operator Operation() const + { + rdcarray words; + words.push_back(condition.value()); + EncodeParam(words, name); + return Operation(OpCode, words); + } + + static constexpr Op OpCode = Op::ConditionalExtensionINTEL; + static constexpr uint16_t MinWordSize = 3U; + Op op; + uint16_t wordCount; + Id condition; + rdcstr name; +}; + +struct OpConditionalEntryPointINTEL +{ + OpConditionalEntryPointINTEL(const ConstIter &it) + { + uint32_t word = 0;(void)word; + this->op = OpCode; + this->wordCount = (uint16_t)it.size(); + this->condition = Id::fromWord(it.word(1)); + this->executionModel = (ExecutionModel)it.word(2); + this->entryPoint = Id::fromWord(it.word(3)); + word = 4; + this->name = DecodeParam(it, word); + this->iface = MultiParam(it, word); + } + OpConditionalEntryPointINTEL(Id condition, ExecutionModel executionModel, Id entryPoint, rdcstr name, const rdcarray &iface = {}) + : op(Op::ConditionalEntryPointINTEL) + , wordCount(MinWordSize + ExtraWordCount(name) + MultiWordCount(iface)) + { + this->condition = condition; + this->executionModel = executionModel; + this->entryPoint = entryPoint; + this->name = name; + this->iface = iface; + } + operator Operation() const + { + rdcarray words; + words.push_back(condition.value()); + words.push_back((uint32_t)executionModel); + words.push_back(entryPoint.value()); + EncodeParam(words, name); + for(size_t i=0; i < iface.size(); i++) + { + words.push_back(iface[i].value()); + } + return Operation(OpCode, words); + } + + static constexpr Op OpCode = Op::ConditionalEntryPointINTEL; + static constexpr uint16_t MinWordSize = 5U; + Op op; + uint16_t wordCount; + Id condition; + ExecutionModel executionModel; + Id entryPoint; + rdcstr name; + rdcarray iface; +}; + +struct OpConditionalCapabilityINTEL +{ + OpConditionalCapabilityINTEL(const ConstIter &it) + { + memcpy(this, it.words(), sizeof(*this)); + } + OpConditionalCapabilityINTEL(Id condition, Capability capability) + : op(Op::ConditionalCapabilityINTEL) + , wordCount(FixedWordSize) + { + this->condition = condition; + this->capability = capability; + } + + static constexpr Op OpCode = Op::ConditionalCapabilityINTEL; + static constexpr uint16_t FixedWordSize = 3U; + Op op; + uint16_t wordCount; + Id condition; + Capability capability; +}; + +struct OpSpecConstantTargetINTEL +{ + OpSpecConstantTargetINTEL(const ConstIter &it) + { + uint32_t word = 0;(void)word; + this->op = OpCode; + this->wordCount = (uint16_t)it.size(); + this->resultType = Id::fromWord(it.word(1)); + this->result = Id::fromWord(it.word(2)); + this->target = (uint32_t)it.word(3); + word = 4; + this->features = MultiParam(it, word); + } + OpSpecConstantTargetINTEL(IdResultType resultType, IdResult result, uint32_t target, const rdcarray &features = {}) + : op(Op::SpecConstantTargetINTEL) + , wordCount(MinWordSize + MultiWordCount(features)) + { + this->resultType = resultType; + this->result = result; + this->target = target; + this->features = features; + } + operator Operation() const + { + rdcarray words; + words.push_back(resultType.value()); + words.push_back(result.value()); + words.push_back((uint32_t)target); + for(size_t i=0; i < features.size(); i++) + { + words.push_back((uint32_t)features[i]); + } + return Operation(OpCode, words); + } + + static constexpr Op OpCode = Op::SpecConstantTargetINTEL; + static constexpr uint16_t MinWordSize = 4U; + Op op; + uint16_t wordCount; + IdResultType resultType; + IdResult result; + uint32_t target; + rdcarray features; +}; + +struct OpSpecConstantArchitectureINTEL +{ + OpSpecConstantArchitectureINTEL(const ConstIter &it) + { + memcpy(this, it.words(), sizeof(*this)); + } + OpSpecConstantArchitectureINTEL(IdResultType resultType, IdResult result, uint32_t category, uint32_t family, uint32_t opcode, uint32_t architecture) + : op(Op::SpecConstantArchitectureINTEL) + , wordCount(FixedWordSize) + { + this->resultType = resultType; + this->result = result; + this->category = category; + this->family = family; + this->opcode = opcode; + this->architecture = architecture; + } + + static constexpr Op OpCode = Op::SpecConstantArchitectureINTEL; + static constexpr uint16_t FixedWordSize = 7U; + Op op; + uint16_t wordCount; + IdResultType resultType; + IdResult result; + uint32_t category; + uint32_t family; + uint32_t opcode; + uint32_t architecture; +}; + +struct OpSpecConstantCapabilitiesINTEL +{ + OpSpecConstantCapabilitiesINTEL(const ConstIter &it) + { + uint32_t word = 0;(void)word; + this->op = OpCode; + this->wordCount = (uint16_t)it.size(); + this->resultType = Id::fromWord(it.word(1)); + this->result = Id::fromWord(it.word(2)); + word = 3; + this->capabilities = MultiParam(it, word); + } + OpSpecConstantCapabilitiesINTEL(IdResultType resultType, IdResult result, const rdcarray &capabilities = {}) + : op(Op::SpecConstantCapabilitiesINTEL) + , wordCount(MinWordSize + MultiWordCount(capabilities)) + { + this->resultType = resultType; + this->result = result; + this->capabilities = capabilities; + } + operator Operation() const + { + rdcarray words; + words.push_back(resultType.value()); + words.push_back(result.value()); + for(size_t i=0; i < capabilities.size(); i++) + { + words.push_back((uint32_t)capabilities[i]); + } + return Operation(OpCode, words); + } + + static constexpr Op OpCode = Op::SpecConstantCapabilitiesINTEL; + static constexpr uint16_t MinWordSize = 3U; + Op op; + uint16_t wordCount; + IdResultType resultType; + IdResult result; + rdcarray capabilities; +}; + +struct OpConditionalCopyObjectINTEL +{ + OpConditionalCopyObjectINTEL(const ConstIter &it) + { + uint32_t word = 0;(void)word; + this->op = OpCode; + this->wordCount = (uint16_t)it.size(); + this->resultType = Id::fromWord(it.word(1)); + this->result = Id::fromWord(it.word(2)); + word = 3; + this->conditional_arguments = MultiParam(it, word); + } + OpConditionalCopyObjectINTEL(IdResultType resultType, IdResult result, const rdcarray &conditional_arguments = {}) + : op(Op::ConditionalCopyObjectINTEL) + , wordCount(MinWordSize + MultiWordCount(conditional_arguments)) + { + this->resultType = resultType; + this->result = result; + this->conditional_arguments = conditional_arguments; + } + operator Operation() const + { + rdcarray words; + words.push_back(resultType.value()); + words.push_back(result.value()); + for(size_t i=0; i < conditional_arguments.size(); i++) + { + words.push_back(conditional_arguments[i].value()); + } + return Operation(OpCode, words); + } + + static constexpr Op OpCode = Op::ConditionalCopyObjectINTEL; + static constexpr uint16_t MinWordSize = 3U; + Op op; + uint16_t wordCount; + IdResultType resultType; + IdResult result; + rdcarray conditional_arguments; +}; + struct OpGroupIMulKHR { OpGroupIMulKHR(const ConstIter &it) @@ -21602,6 +22192,78 @@ struct OpMaskedScatterINTEL Id mask; }; +struct OpConvertHandleToImageINTEL +{ + OpConvertHandleToImageINTEL(const ConstIter &it) + { + memcpy(this, it.words(), sizeof(*this)); + } + OpConvertHandleToImageINTEL(IdResultType resultType, IdResult result, Id operand) + : op(Op::ConvertHandleToImageINTEL) + , wordCount(FixedWordSize) + { + this->resultType = resultType; + this->result = result; + this->operand = operand; + } + + static constexpr Op OpCode = Op::ConvertHandleToImageINTEL; + static constexpr uint16_t FixedWordSize = 4U; + Op op; + uint16_t wordCount; + IdResultType resultType; + IdResult result; + Id operand; +}; + +struct OpConvertHandleToSamplerINTEL +{ + OpConvertHandleToSamplerINTEL(const ConstIter &it) + { + memcpy(this, it.words(), sizeof(*this)); + } + OpConvertHandleToSamplerINTEL(IdResultType resultType, IdResult result, Id operand) + : op(Op::ConvertHandleToSamplerINTEL) + , wordCount(FixedWordSize) + { + this->resultType = resultType; + this->result = result; + this->operand = operand; + } + + static constexpr Op OpCode = Op::ConvertHandleToSamplerINTEL; + static constexpr uint16_t FixedWordSize = 4U; + Op op; + uint16_t wordCount; + IdResultType resultType; + IdResult result; + Id operand; +}; + +struct OpConvertHandleToSampledImageINTEL +{ + OpConvertHandleToSampledImageINTEL(const ConstIter &it) + { + memcpy(this, it.words(), sizeof(*this)); + } + OpConvertHandleToSampledImageINTEL(IdResultType resultType, IdResult result, Id operand) + : op(Op::ConvertHandleToSampledImageINTEL) + , wordCount(FixedWordSize) + { + this->resultType = resultType; + this->result = result; + this->operand = operand; + } + + static constexpr Op OpCode = Op::ConvertHandleToSampledImageINTEL; + static constexpr uint16_t FixedWordSize = 4U; + Op op; + uint16_t wordCount; + IdResultType resultType; + IdResult result; + Id operand; +}; + template inline rdcstr ParamToStr(const std::function &idName, const T &el) { diff --git a/renderdoc/driver/shaders/spirv/spirv_registry.md b/renderdoc/driver/shaders/spirv/spirv_registry.md new file mode 100644 index 000000000..3f2c16ccb --- /dev/null +++ b/renderdoc/driver/shaders/spirv/spirv_registry.md @@ -0,0 +1,209 @@ +# SPIRV-Registry + +SPIR-V is a binary intermediate language for representing graphical-shader stages and compute kernels for multiple Khronos APIs, including OpenCL, OpenGL, and Vulkan. + +[A complete registry of all official SPIR-V specifications is available at the +Khronos SPIR-V Registry](https://www.khronos.org/registry/spir-v/). + +## This Project Contains + +- A registry of SPIR-V extensions +- Issue tracking for all SPIR-V specifications +- Pull requests to add new SPIR-V extensions + +## Publishing new extension + +To publish a new extension, please create a pull request which includes: + +- The extension document in the asciidoc format named following + the `SPV__.asciidoc` pattern. The document should be placed + in the `extension/` folder. +- README.md update with the link to the new extension once published + +To publish a non-semantic extended instruction set, + +- The instruction set in the asciidoc format named following + the `NonSemantic..asciidoc` pattern. The document should be placed + in the `nonsemantic` folder. +- README.md update with the link to the new extension once published + +Please see [BUILD.md](BUILD.md) for instructions to create an HTML specification for this repo. + +Note: we no longer push the HTML along side the extension. + +## Extension Specifications + +### KHR Extensions (Khronos) + +* [SPV_KHR_16bit_storage ]( https://github.khronos.org/SPIRV-Registry/extensions/KHR/SPV_KHR_16bit_storage.html) +* [SPV_KHR_8bit_storage ]( https://github.khronos.org/SPIRV-Registry/extensions/KHR/SPV_KHR_8bit_storage.html) +* [SPV_KHR_bfloat16 ]( https://github.khronos.org/SPIRV-Registry/extensions/KHR/SPV_KHR_bfloat16.html) +* [SPV_KHR_bit_instructions ]( https://github.khronos.org/SPIRV-Registry/extensions/KHR/SPV_KHR_bit_instructions.html) +* [SPV_KHR_compute_shader_derivatives ]( https://github.khronos.org/SPIRV-Registry/extensions/KHR/SPV_KHR_compute_shader_derivatives.html) +* [SPV_KHR_cooperative_matrix ]( https://github.khronos.org/SPIRV-Registry/extensions/KHR/SPV_KHR_cooperative_matrix.html) +* [SPV_KHR_device_group ]( https://github.khronos.org/SPIRV-Registry/extensions/KHR/SPV_KHR_device_group.html) +* [SPV_KHR_expect_assume ]( https://github.khronos.org/SPIRV-Registry/extensions/KHR/SPV_KHR_expect_assume.html) +* [SPV_KHR_float_controls ]( https://github.khronos.org/SPIRV-Registry/extensions/KHR/SPV_KHR_float_controls.html) +* [SPV_KHR_float_controls2 ]( https://github.khronos.org/SPIRV-Registry/extensions/KHR/SPV_KHR_float_controls2.html) +* [SPV_KHR_fma ]( https://github.khronos.org/SPIRV-Registry/extensions/KHR/SPV_KHR_fma.html) +* [SPV_KHR_fragment_shader_barycentric ]( https://github.khronos.org/SPIRV-Registry/extensions/KHR/SPV_KHR_fragment_shader_barycentric.html) +* [SPV_KHR_fragment_shading_rate ]( https://github.khronos.org/SPIRV-Registry/extensions/KHR/SPV_KHR_fragment_shading_rate.html) +* [SPV_KHR_integer_dot_product ]( https://github.khronos.org/SPIRV-Registry/extensions/KHR/SPV_KHR_integer_dot_product.html) +* [SPV_KHR_linkonce_odr ]( https://github.khronos.org/SPIRV-Registry/extensions/KHR/SPV_KHR_linkonce_odr.html) +* [SPV_KHR_maximal_reconvergence ]( https://github.khronos.org/SPIRV-Registry/extensions/KHR/SPV_KHR_maximal_reconvergence.html) +* [SPV_KHR_multiview ]( https://github.khronos.org/SPIRV-Registry/extensions/KHR/SPV_KHR_multiview.html) +* [SPV_KHR_no_integer_wrap_decoration ]( https://github.khronos.org/SPIRV-Registry/extensions/KHR/SPV_KHR_no_integer_wrap_decoration.html) +* [SPV_KHR_non_semantic_info ]( https://github.khronos.org/SPIRV-Registry/extensions/KHR/SPV_KHR_non_semantic_info.html) +* [SPV_KHR_physical_storage_buffer ]( https://github.khronos.org/SPIRV-Registry/extensions/KHR/SPV_KHR_physical_storage_buffer.html) +* [SPV_KHR_post_depth_coverage ]( https://github.khronos.org/SPIRV-Registry/extensions/KHR/SPV_KHR_post_depth_coverage.html) +* [SPV_KHR_quad_control ]( https://github.khronos.org/SPIRV-Registry/extensions/KHR/SPV_KHR_quad_control.html) +* [SPV_KHR_ray_cull_mask ]( https://github.khronos.org/SPIRV-Registry/extensions/KHR/SPV_KHR_ray_cull_mask.html) +* [SPV_KHR_ray_query ]( https://github.khronos.org/SPIRV-Registry/extensions/KHR/SPV_KHR_ray_query.html) +* [SPV_KHR_ray_tracing ]( https://github.khronos.org/SPIRV-Registry/extensions/KHR/SPV_KHR_ray_tracing.html) +* [SPV_KHR_ray_tracing_position_fetch ]( https://github.khronos.org/SPIRV-Registry/extensions/KHR/SPV_KHR_ray_tracing_position_fetch.html) +* [SPV_KHR_relaxed_extended_instruction ]( https://github.khronos.org/SPIRV-Registry/extensions/KHR/SPV_KHR_relaxed_extended_instruction.html) +* [SPV_KHR_shader_atomic_counter_ops ]( https://github.khronos.org/SPIRV-Registry/extensions/KHR/SPV_KHR_shader_atomic_counter_ops.html) +* [SPV_KHR_shader_ballot ]( https://github.khronos.org/SPIRV-Registry/extensions/KHR/SPV_KHR_shader_ballot.html) +* [SPV_KHR_shader_clock ]( https://github.khronos.org/SPIRV-Registry/extensions/KHR/SPV_KHR_shader_clock.html) +* [SPV_KHR_shader_draw_parameters ]( https://github.khronos.org/SPIRV-Registry/extensions/KHR/SPV_KHR_shader_draw_parameters.html) +* [SPV_KHR_storage_buffer_storage_class ]( https://github.khronos.org/SPIRV-Registry/extensions/KHR/SPV_KHR_storage_buffer_storage_class.html) +* [SPV_KHR_subgroup_rotate ]( https://github.khronos.org/SPIRV-Registry/extensions/KHR/SPV_KHR_subgroup_rotate.html) +* [SPV_KHR_subgroup_uniform_control_flow ]( https://github.khronos.org/SPIRV-Registry/extensions/KHR/SPV_KHR_subgroup_uniform_control_flow.html) +* [SPV_KHR_subgroup_vote ]( https://github.khronos.org/SPIRV-Registry/extensions/KHR/SPV_KHR_subgroup_vote.html) +* [SPV_KHR_terminate_invocation ]( https://github.khronos.org/SPIRV-Registry/extensions/KHR/SPV_KHR_terminate_invocation.html) +* [SPV_KHR_uniform_group_instructions ]( https://github.khronos.org/SPIRV-Registry/extensions/KHR/SPV_KHR_uniform_group_instructions.html) +* [SPV_KHR_untyped_pointers ]( https://github.khronos.org/SPIRV-Registry/extensions/KHR/SPV_KHR_untyped_pointers.html) +* [SPV_KHR_variable_pointers ]( https://github.khronos.org/SPIRV-Registry/extensions/KHR/SPV_KHR_variable_pointers.html) +* [SPV_KHR_vulkan_memory_model ]( https://github.khronos.org/SPIRV-Registry/extensions/KHR/SPV_KHR_vulkan_memory_model.html) +* [SPV_KHR_workgroup_memory_explicit_layout]( https://github.khronos.org/SPIRV-Registry/extensions/KHR/SPV_KHR_workgroup_memory_explicit_layout.html) + +### EXT Extensions (Multivendor) + +* [SPV_EXT_arithmetic_fence ]( https://github.khronos.org/SPIRV-Registry/extensions/EXT/SPV_EXT_arithmetic_fence.html) +* [SPV_EXT_demote_to_helper_invocation ]( https://github.khronos.org/SPIRV-Registry/extensions/EXT/SPV_EXT_demote_to_helper_invocation.html) +* [SPV_EXT_descriptor_indexing ]( https://github.khronos.org/SPIRV-Registry/extensions/EXT/SPV_EXT_descriptor_indexing.html) +* [SPV_EXT_float8 ]( https://github.khronos.org/SPIRV-Registry/extensions/EXT/SPV_EXT_float8.html) +* [SPV_EXT_fragment_fully_covered ]( https://github.khronos.org/SPIRV-Registry/extensions/EXT/SPV_EXT_fragment_fully_covered.html) +* [SPV_EXT_fragment_invocation_density ]( https://github.khronos.org/SPIRV-Registry/extensions/EXT/SPV_EXT_fragment_invocation_density.html) +* [SPV_EXT_fragment_shader_interlock ]( https://github.khronos.org/SPIRV-Registry/extensions/EXT/SPV_EXT_fragment_shader_interlock.html) +* [SPV_EXT_image_raw10_raw12 ]( https://github.khronos.org/SPIRV-Registry/extensions/EXT/SPV_EXT_image_raw10_raw12.html) +* [SPV_EXT_mesh_shader ]( https://github.khronos.org/SPIRV-Registry/extensions/EXT/SPV_EXT_mesh_shader.html) +* [SPV_EXT_opacity_micromap ]( https://github.khronos.org/SPIRV-Registry/extensions/EXT/SPV_EXT_opacity_micromap.html) +* [SPV_EXT_optnone ]( https://github.khronos.org/SPIRV-Registry/extensions/EXT/SPV_EXT_optnone.html) +* [SPV_EXT_physical_storage_buffer ]( https://github.khronos.org/SPIRV-Registry/extensions/EXT/SPV_EXT_physical_storage_buffer.html) +* [SPV_EXT_relaxed_printf_string_address_space]( https://github.khronos.org/SPIRV-Registry/extensions/EXT/SPV_EXT_relaxed_printf_string_address_space.html) +* [SPV_EXT_replicated_composites ]( https://github.khronos.org/SPIRV-Registry/extensions/EXT/SPV_EXT_replicated_composites.html) +* [SPV_EXT_shader_64bit_indexing ]( https://github.khronos.org/SPIRV-Registry/extensions/EXT/SPV_EXT_shader_64bit_indexing.html) +* [SPV_EXT_shader_atomic_float_add ]( https://github.khronos.org/SPIRV-Registry/extensions/EXT/SPV_EXT_shader_atomic_float_add.html) +* [SPV_EXT_shader_atomic_float_min_max ]( https://github.khronos.org/SPIRV-Registry/extensions/EXT/SPV_EXT_shader_atomic_float_min_max.html) +* [SPV_EXT_shader_atomic_float16_add ]( https://github.khronos.org/SPIRV-Registry/extensions/EXT/SPV_EXT_shader_atomic_float16_add.html) +* [SPV_EXT_shader_image_int64 ]( https://github.khronos.org/SPIRV-Registry/extensions/EXT/SPV_EXT_shader_image_int64.html) +* [SPV_EXT_shader_stencil_export ]( https://github.khronos.org/SPIRV-Registry/extensions/EXT/SPV_EXT_shader_stencil_export.html) +* [SPV_EXT_shader_tile_image ]( https://github.khronos.org/SPIRV-Registry/extensions/EXT/SPV_EXT_shader_tile_image.html) +* [SPV_EXT_shader_viewport_index_layer ]( https://github.khronos.org/SPIRV-Registry/extensions/EXT/SPV_EXT_shader_viewport_index_layer.html) + +### Vendor Extensions + +* [SPV_ALTERA_arbitrary_precision_fixed_point]( https://github.khronos.org/SPIRV-Registry/extensions/ALTERA/SPV_ALTERA_arbitrary_precision_fixed_point.html) +* [SPV_ALTERA_arbitrary_precision_floating_point]( https://github.khronos.org/SPIRV-Registry/extensions/ALTERA/SPV_ALTERA_arbitrary_precision_floating_point.html) +* [SPV_ALTERA_arbitrary_precision_integers ]( https://github.khronos.org/SPIRV-Registry/extensions/ALTERA/SPV_ALTERA_arbitrary_precision_integers.html) +* [SPV_ALTERA_blocking_pipes ]( https://github.khronos.org/SPIRV-Registry/extensions/ALTERA/SPV_ALTERA_blocking_pipes.html) +* [SPV_ALTERA_fpga_argument_interfaces ]( https://github.khronos.org/SPIRV-Registry/extensions/ALTERA/SPV_ALTERA_fpga_argument_interfaces.html) +* [SPV_ALTERA_fpga_buffer_location ]( https://github.khronos.org/SPIRV-Registry/extensions/ALTERA/SPV_ALTERA_fpga_buffer_location.html) +* [SPV_ALTERA_fpga_cluster_attributes ]( https://github.khronos.org/SPIRV-Registry/extensions/ALTERA/SPV_ALTERA_fpga_cluster_attributes.html) +* [SPV_ALTERA_fpga_dsp_control ]( https://github.khronos.org/SPIRV-Registry/extensions/ALTERA/SPV_ALTERA_fpga_dsp_control.html) +* [SPV_ALTERA_fpga_invocation_pipelining_attributes]( https://github.khronos.org/SPIRV-Registry/extensions/ALTERA/SPV_ALTERA_fpga_invocation_pipelining_attributes.html) +* [SPV_ALTERA_fpga_latency_control ]( https://github.khronos.org/SPIRV-Registry/extensions/ALTERA/SPV_ALTERA_fpga_latency_control.html) +* [SPV_ALTERA_fpga_loop_controls ]( https://github.khronos.org/SPIRV-Registry/extensions/ALTERA/SPV_ALTERA_fpga_loop_controls.html) +* [SPV_ALTERA_fpga_memory_accesses ]( https://github.khronos.org/SPIRV-Registry/extensions/ALTERA/SPV_ALTERA_fpga_memory_accesses.html) +* [SPV_ALTERA_fpga_memory_attributes ]( https://github.khronos.org/SPIRV-Registry/extensions/ALTERA/SPV_ALTERA_fpga_memory_attributes.html) +* [SPV_ALTERA_fpga_reg ]( https://github.khronos.org/SPIRV-Registry/extensions/ALTERA/SPV_ALTERA_fpga_reg.html) +* [SPV_ALTERA_global_variable_fpga_decorations]( https://github.khronos.org/SPIRV-Registry/extensions/ALTERA/SPV_ALTERA_global_variable_fpga_decorations.html) +* [SPV_ALTERA_io_pipes ]( https://github.khronos.org/SPIRV-Registry/extensions/ALTERA/SPV_ALTERA_io_pipes.html) +* [SPV_ALTERA_loop_fuse ]( https://github.khronos.org/SPIRV-Registry/extensions/ALTERA/SPV_ALTERA_loop_fuse.html) +* [SPV_ALTERA_runtime_aligned ]( https://github.khronos.org/SPIRV-Registry/extensions/ALTERA/SPV_ALTERA_runtime_aligned.html) +* [SPV_ALTERA_task_sequence ]( https://github.khronos.org/SPIRV-Registry/extensions/ALTERA/SPV_ALTERA_task_sequence.html) +* [SPV_ALTERA_usm_storage_classes ]( https://github.khronos.org/SPIRV-Registry/extensions/ALTERA/SPV_ALTERA_usm_storage_classes.html) +* [SPV_AMD_gcn_shader ]( https://github.khronos.org/SPIRV-Registry/extensions/AMD/SPV_AMD_gcn_shader.html) +* [SPV_AMD_gpu_shader_half_float ]( https://github.khronos.org/SPIRV-Registry/extensions/AMD/SPV_AMD_gpu_shader_half_float.html) +* [SPV_AMD_gpu_shader_half_float_fetch ]( https://github.khronos.org/SPIRV-Registry/extensions/AMD/SPV_AMD_gpu_shader_half_float_fetch.html) +* [SPV_AMD_gpu_shader_int16 ]( https://github.khronos.org/SPIRV-Registry/extensions/AMD/SPV_AMD_gpu_shader_int16.html) +* [SPV_AMD_shader_ballot ]( https://github.khronos.org/SPIRV-Registry/extensions/AMD/SPV_AMD_shader_ballot.html) +* [SPV_AMD_shader_early_and_late_fragment_tests]( https://github.khronos.org/SPIRV-Registry/extensions/AMD/SPV_AMD_shader_early_and_late_fragment_tests.html) +* [SPV_AMD_shader_explicit_vertex_parameter]( https://github.khronos.org/SPIRV-Registry/extensions/AMD/SPV_AMD_shader_explicit_vertex_parameter.html) +* [SPV_AMD_shader_fragment_mask ]( https://github.khronos.org/SPIRV-Registry/extensions/AMD/SPV_AMD_shader_fragment_mask.html) +* [SPV_AMD_shader_image_load_store_lod ]( https://github.khronos.org/SPIRV-Registry/extensions/AMD/SPV_AMD_shader_image_load_store_lod.html) +* [SPV_AMD_shader_trinary_minmax ]( https://github.khronos.org/SPIRV-Registry/extensions/AMD/SPV_AMD_shader_trinary_minmax.html) +* [SPV_AMD_texture_gather_bias_lod ]( https://github.khronos.org/SPIRV-Registry/extensions/AMD/SPV_AMD_texture_gather_bias_lod.html) +* [SPV_AMDX_shader_enqueue ]( https://github.khronos.org/SPIRV-Registry/extensions/AMD/SPV_AMDX_shader_enqueue.html) +* [SPV_ARM_cooperative_matrix_layouts ]( https://github.khronos.org/SPIRV-Registry/extensions/ARM/SPV_ARM_cooperative_matrix_layouts.html) +* [SPV_ARM_core_builtins ]( https://github.khronos.org/SPIRV-Registry/extensions/ARM/SPV_ARM_core_builtins.html) +* [SPV_ARM_graph ]( https://github.khronos.org/SPIRV-Registry/extensions/ARM/SPV_ARM_graph.html) +* [SPV_ARM_tensors ]( https://github.khronos.org/SPIRV-Registry/extensions/ARM/SPV_ARM_tensors.html) +* [SPV_GOOGLE_decorate_string ]( https://github.khronos.org/SPIRV-Registry/extensions/GOOGLE/SPV_GOOGLE_decorate_string.html) +* [SPV_GOOGLE_hlsl_functionality1 ]( https://github.khronos.org/SPIRV-Registry/extensions/GOOGLE/SPV_GOOGLE_hlsl_functionality1.html) +* [SPV_GOOGLE_user_type ]( https://github.khronos.org/SPIRV-Registry/extensions/GOOGLE/SPV_GOOGLE_user_type.html) +* [SPV_HUAWEI_cluster_culling_shader ]( https://github.khronos.org/SPIRV-Registry/extensions/HUAWEI/SPV_HUAWEI_cluster_culling_shader.html) +* [SPV_HUAWEI_subpass_shading ]( https://github.khronos.org/SPIRV-Registry/extensions/HUAWEI/SPV_HUAWEI_subpass_shading.html) +* [SPV_INTEL_2d_block_io ]( https://github.khronos.org/SPIRV-Registry/extensions/INTEL/SPV_INTEL_2d_block_io.html) +* [SPV_INTEL_bfloat16_conversion ]( https://github.khronos.org/SPIRV-Registry/extensions/INTEL/SPV_INTEL_bfloat16_conversion.html) +* [SPV_INTEL_cache_controls ]( https://github.khronos.org/SPIRV-Registry/extensions/INTEL/SPV_INTEL_cache_controls.html) +* [SPV_INTEL_device_side_avc_motion_estimation]( https://github.khronos.org/SPIRV-Registry/extensions/INTEL/SPV_INTEL_device_side_avc_motion_estimation.html) +* [SPV_INTEL_fp_fast_math_mode ]( https://github.khronos.org/SPIRV-Registry/extensions/INTEL/SPV_INTEL_fp_fast_math_mode.html) +* [SPV_INTEL_fp_max_error ]( https://github.khronos.org/SPIRV-Registry/extensions/INTEL/SPV_INTEL_fp_max_error.html) +* [SPV_INTEL_global_variable_host_access ]( https://github.khronos.org/SPIRV-Registry/extensions/INTEL/SPV_INTEL_global_variable_host_access.html) +* [SPV_INTEL_int4 ]( https://github.khronos.org/SPIRV-Registry/extensions/INTEL/SPV_INTEL_int4.html) +* [SPV_INTEL_kernel_attributes ]( https://github.khronos.org/SPIRV-Registry/extensions/INTEL/SPV_INTEL_kernel_attributes.html) +* [SPV_INTEL_long_composites ]( https://github.khronos.org/SPIRV-Registry/extensions/INTEL/SPV_INTEL_long_composites.html) +* [SPV_INTEL_masked_gather_scatter ]( https://github.khronos.org/SPIRV-Registry/extensions/INTEL/SPV_INTEL_masked_gather_scatter.html) +* [SPV_INTEL_maximum_registers ]( https://github.khronos.org/SPIRV-Registry/extensions/INTEL/SPV_INTEL_maximum_registers.html) +* [SPV_INTEL_media_block_io ]( https://github.khronos.org/SPIRV-Registry/extensions/INTEL/SPV_INTEL_media_block_io.html) +* [SPV_INTEL_shader_integer_functions2 ]( https://github.khronos.org/SPIRV-Registry/extensions/INTEL/SPV_INTEL_shader_integer_functions2.html) +* [SPV_INTEL_split_barrier ]( https://github.khronos.org/SPIRV-Registry/extensions/INTEL/SPV_INTEL_split_barrier.html) +* [SPV_INTEL_subgroups ]( https://github.khronos.org/SPIRV-Registry/extensions/INTEL/SPV_INTEL_subgroups.html) +* [SPV_INTEL_subgroup_buffer_prefetch ]( https://github.khronos.org/SPIRV-Registry/extensions/INTEL/SPV_INTEL_subgroup_buffer_prefetch.html) +* [SPV_INTEL_subgroup_matrix_multiply_accumulate]( https://github.khronos.org/SPIRV-Registry/extensions/INTEL/SPV_INTEL_subgroup_matrix_multiply_accumulate.html) +* [SPV_INTEL_tensor_float32_conversion ]( https://github.khronos.org/SPIRV-Registry/extensions/INTEL/SPV_INTEL_tensor_float32_conversion.html) +* [SPV_INTEL_ternary_bitwise_function ]( https://github.khronos.org/SPIRV-Registry/extensions/INTEL/SPV_INTEL_ternary_bitwise_function.html) +* [SPV_INTEL_unstructured_loop_controls ]( https://github.khronos.org/SPIRV-Registry/extensions/INTEL/SPV_INTEL_unstructured_loop_controls.html) +* [SPV_INTEL_variable_length_array ]( https://github.khronos.org/SPIRV-Registry/extensions/INTEL/SPV_INTEL_variable_length_array.html) +* [SPV_NV_bindless_texture ]( https://github.khronos.org/SPIRV-Registry/extensions/NV/SPV_NV_bindless_texture.html) +* [SPV_NV_cluster_acceleration_structure ]( https://github.khronos.org/SPIRV-Registry/extensions/NV/SPV_NV_cluster_acceleration_structure.html) +* [SPV_NV_compute_shader_derivatives ]( https://github.khronos.org/SPIRV-Registry/extensions/NV/SPV_NV_compute_shader_derivatives.html) +* [SPV_NV_cooperative_matrix ]( https://github.khronos.org/SPIRV-Registry/extensions/NV/SPV_NV_cooperative_matrix.html) +* [SPV_NV_cooperative_matrix2 ]( https://github.khronos.org/SPIRV-Registry/extensions/NV/SPV_NV_cooperative_matrix2.html) +* [SPV_NV_cooperative_vector ]( https://github.khronos.org/SPIRV-Registry/extensions/NV/SPV_NV_cooperative_vector.html) +* [SPV_NV_displacement_micromap ]( https://github.khronos.org/SPIRV-Registry/extensions/NV/SPV_NV_displacement_micromap.html) +* [SPV_NV_fragment_shader_barycentric ]( https://github.khronos.org/SPIRV-Registry/extensions/NV/SPV_NV_fragment_shader_barycentric.html) +* [SPV_NV_geometry_shader_passthrough ]( https://github.khronos.org/SPIRV-Registry/extensions/NV/SPV_NV_geometry_shader_passthrough.html) +* [SPV_NV_linear_swept_spheres ]( https://github.khronos.org/SPIRV-Registry/extensions/NV/SPV_NV_linear_swept_spheres.html) +* [SPV_NV_mesh_shader ]( https://github.khronos.org/SPIRV-Registry/extensions/NV/SPV_NV_mesh_shader.html) +* [SPV_NV_raw_access_chains ]( https://github.khronos.org/SPIRV-Registry/extensions/NV/SPV_NV_raw_access_chains.html) +* [SPV_NV_ray_tracing ]( https://github.khronos.org/SPIRV-Registry/extensions/NV/SPV_NV_ray_tracing.html) +* [SPV_NV_ray_tracing_motion_blur ]( https://github.khronos.org/SPIRV-Registry/extensions/NV/SPV_NV_ray_tracing_motion_blur.html) +* [SPV_NV_sample_mask_override_coverage ]( https://github.khronos.org/SPIRV-Registry/extensions/NV/SPV_NV_sample_mask_override_coverage.html) +* [SPV_NV_shader_atomic_fp16_vector ]( https://github.khronos.org/SPIRV-Registry/extensions/NV/SPV_NV_shader_atomic_fp16_vector.html) +* [SPV_NV_shader_image_footprint ]( https://github.khronos.org/SPIRV-Registry/extensions/NV/SPV_NV_shader_image_footprint.html) +* [SPV_NV_shader_invocation_reorder ]( https://github.khronos.org/SPIRV-Registry/extensions/NV/SPV_NV_shader_invocation_reorder.html) +* [SPV_NV_shader_sm_builtins ]( https://github.khronos.org/SPIRV-Registry/extensions/NV/SPV_NV_shader_sm_builtins.html) +* [SPV_NV_shader_subgroup_partitioned ]( https://github.khronos.org/SPIRV-Registry/extensions/NV/SPV_NV_shader_subgroup_partitioned.html) +* [SPV_NV_shading_rate ]( https://github.khronos.org/SPIRV-Registry/extensions/NV/SPV_NV_shading_rate.html) +* [SPV_NV_stereo_view_rendering ]( https://github.khronos.org/SPIRV-Registry/extensions/NV/SPV_NV_stereo_view_rendering.html) +* [SPV_NV_tensor_addressing ]( https://github.khronos.org/SPIRV-Registry/extensions/NV/SPV_NV_tensor_addressing.html) +* [SPV_NV_viewport_array2 ]( https://github.khronos.org/SPIRV-Registry/extensions/NV/SPV_NV_viewport_array2.html) +* [SPV_NVX_multiview_per_view_attributes ]( https://github.khronos.org/SPIRV-Registry/extensions/NV/SPV_NVX_multiview_per_view_attributes.html) +* [SPV_QCOM_cooperative_matrix_conversion ]( https://github.khronos.org/SPIRV-Registry/extensions/QCOM/SPV_QCOM_cooperative_matrix_conversion.html) +* [SPV_QCOM_image_processing ]( https://github.khronos.org/SPIRV-Registry/extensions/QCOM/SPV_QCOM_image_processing.html) +* [SPV_QCOM_image_processing2 ]( https://github.khronos.org/SPIRV-Registry/extensions/QCOM/SPV_QCOM_image_processing2.html) +* [SPV_QCOM_tile_shading ]( https://github.khronos.org/SPIRV-Registry/extensions/QCOM/SPV_QCOM_tile_shading.html) + +## Non-Semantic Extended Instruction Set Specifications + +* [NonSemantic.ClspvReflection ]( https://github.khronos.org/SPIRV-Registry/nonsemantic/NonSemantic.ClspvReflection.html) +* [NonSemantic.DebugBreak ]( https://github.khronos.org/SPIRV-Registry/nonsemantic/NonSemantic.DebugBreak.html) +* [NonSemantic.DebugPrintf ]( https://github.khronos.org/SPIRV-Registry/nonsemantic/NonSemantic.DebugPrintf.html) +* [NonSemantic.Shader.DebugInfo.100 ]( https://github.khronos.org/SPIRV-Registry/nonsemantic/NonSemantic.Shader.DebugInfo.100.html) + +## Extended Instruction Set Specifications + +* [TOSA.001000.1 ]( https://github.khronos.org/SPIRV-Registry/extended/TOSA.001000.1.html)