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DXIL Debugger support for DXOp::Dot4AddI8Packed, DXOp::Dot4AddU8Packed
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@@ -3627,6 +3627,47 @@ bool ThreadState::ExecuteInstruction(DebugAPIWrapper *apiWrapper,
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result.value.f32v[0] = acc + ax * bx + ay * by;
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break;
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}
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case DXOp::Dot4AddI8Packed:
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case DXOp::Dot4AddU8Packed:
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{
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// SM6.4
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// Dot4AddI8Packed(acc,a,b)
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// signed dot product of 4 x i8 vectors packed into i32, with accumulate to i32
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// Dot4AddU8Packed(acc,a,b)
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// unsigned dot product of 4 x u8 vectors packed into i32, with accumulate to i32
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RDCASSERTEQUAL(inst.args[1]->type->type, Type::TypeKind::Scalar);
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RDCASSERTEQUAL(inst.args[1]->type->scalarType, Type::Int);
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RDCASSERTEQUAL(inst.args[1]->type->bitWidth, 32);
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RDCASSERTEQUAL(inst.args[2]->type->type, Type::TypeKind::Scalar);
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RDCASSERTEQUAL(inst.args[2]->type->scalarType, Type::Int);
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RDCASSERTEQUAL(inst.args[2]->type->bitWidth, 32);
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RDCASSERTEQUAL(inst.args[3]->type->type, Type::TypeKind::Scalar);
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RDCASSERTEQUAL(inst.args[3]->type->scalarType, Type::Int);
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RDCASSERTEQUAL(inst.args[3]->type->bitWidth, 32);
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ShaderVariable acc;
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RDCASSERT(GetShaderVariable(inst.args[1], opCode, dxOpCode, acc));
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ShaderVariable a;
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RDCASSERT(GetShaderVariable(inst.args[2], opCode, dxOpCode, a));
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ShaderVariable b;
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RDCASSERT(GetShaderVariable(inst.args[3], opCode, dxOpCode, b));
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if(dxOpCode == DXOp::Dot4AddI8Packed)
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{
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int32_t res = acc.value.s32v[0];
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for(uint32_t col = 0; col < 4; ++col)
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res += (int32_t)a.value.s8v[col] * (int32_t)b.value.s8v[col];
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result.value.s32v[0] = res;
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}
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else
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{
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uint32_t res = acc.value.u32v[0];
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for(uint32_t col = 0; col < 4; ++col)
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res += (uint32_t)a.value.u8v[col] * (uint32_t)b.value.u8v[col];
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result.value.u32v[0] = res;
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}
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break;
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}
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// Likely to implement when required
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// SM6.7
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case DXOp::QuadVote:
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@@ -3650,12 +3691,6 @@ bool ThreadState::ExecuteInstruction(DebugAPIWrapper *apiWrapper,
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// For UAV buffer with counter: must be RWRawBuffer
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// atomically increments/decrements the hidden 32-bit counter stored with a Count or Append UAV
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// SM6.4
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case DXOp::Dot4AddI8Packed:
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// signed dot product of 4 x i8 vectors packed into i32, with accumulate to i32
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case DXOp::Dot4AddU8Packed:
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// unsigned dot product of 4 x u8 vectors packed into i32, with accumulate to i32
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// SM6.6
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case DXOp::Unpack4x8:
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// unpacks 4 8-bit signed or unsigned values into int32 or int16 vector
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@@ -1876,8 +1876,6 @@ rdcstr Program::GetDebugStatus()
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case DXOp::CallShader:
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case DXOp::CreateHandleForLib:
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case DXOp::PrimitiveIndex:
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case DXOp::Dot4AddI8Packed:
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case DXOp::Dot4AddU8Packed:
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case DXOp::WaveMatch:
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case DXOp::WaveMultiPrefixOp:
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case DXOp::WaveMultiPrefixBitCount:
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