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https://github.com/baldurk/renderdoc.git
synced 2026-05-12 13:00:32 +00:00
Add DXIL Debugger Support for Wave Scan and Prefix ops
DXOp::WavePrefixOp DxOp::WavePrefixBitCount
This commit is contained in:
@@ -124,6 +124,68 @@ static bool DecodePointer(DXILDebug::Id &ptrId, uint64_t &offset, uint64_t &size
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return true;
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}
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static void SetFloatValue(float val, ShaderVariable &var)
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{
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for(uint8_t c = 0; c < var.columns; c++)
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{
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#undef _IMPL
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#define _IMPL(T) comp<T>(var, c) = val;
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IMPL_FOR_FLOAT_TYPES(_IMPL);
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}
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}
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static void SetUIntValue(uint64_t val, ShaderVariable &var)
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{
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for(uint8_t c = 0; c < var.columns; c++)
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{
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#undef _IMPL
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#define _IMPL(I, S, U) comp<U>(var, c) = U(val);
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IMPL_FOR_INT_TYPES(_IMPL);
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}
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}
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static void SetIntValue(int64_t val, ShaderVariable &var)
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{
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for(uint8_t c = 0; c < var.columns; c++)
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{
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#undef _IMPL
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#define _IMPL(I, S, U) comp<I>(var, c) = I(val);
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IMPL_FOR_INT_TYPES(_IMPL);
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}
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}
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static void SetShaderValue(float fVal, uint64_t uVal, int64_t iVal, ShaderVariable &var)
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{
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switch(var.type)
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{
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case VarType::Half:
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case VarType::Float:
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case VarType::Double: SetFloatValue(fVal, var); break;
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case VarType::SByte:
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case VarType::SShort:
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case VarType::SInt:
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case VarType::SLong: SetIntValue(iVal, var); break;
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case VarType::UByte:
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case VarType::UShort:
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case VarType::UInt:
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case VarType::ULong: SetUIntValue(uVal, var); break;
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default: RDCERR("Unknown type %s", ToStr(var.type).c_str());
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}
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}
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static void SetShaderValueZero(ShaderVariable &var)
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{
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SetShaderValue(0.0f, 0, 0, var);
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}
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static void SetShaderValueOne(ShaderVariable &var)
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{
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SetShaderValue(1.0f, 1, 1, var);
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}
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static bool OperationFlushing(const Operation op, DXOp dxOpCode)
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{
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if(dxOpCode != DXOp::NumOpCodes)
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@@ -3721,12 +3783,125 @@ bool ThreadState::ExecuteInstruction(DebugAPIWrapper *apiWrapper,
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}
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break;
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}
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case DXOp::WavePrefixOp:
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{
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// WavePrefixOp(value,op,sop)
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ShaderVariable arg;
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RDCASSERT(GetShaderVariable(inst.args[2], opCode, dxOpCode, arg));
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WaveOpCode waveOpCode = (WaveOpCode)arg.value.u32v[0];
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RDCASSERT(GetShaderVariable(inst.args[3], opCode, dxOpCode, arg));
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bool isUnsigned = (arg.value.u32v[0] != (uint32_t)SignedOpKind::Signed);
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// set the identity
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ShaderVariable accum(result);
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switch(waveOpCode)
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{
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case WaveOpCode::Sum: SetShaderValueZero(accum); break;
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case WaveOpCode::Product: SetShaderValueOne(accum); break;
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default:
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RDCERR("Unhandled PrefixOp wave opcode");
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accum.value = {};
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break;
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}
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// determine active lane indices in our subgroup
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rdcarray<uint32_t> activeLanes;
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GetSubgroupActiveLanes(activeMask, workgroup, activeLanes);
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for(uint32_t lane : activeLanes)
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{
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// stop before processing our lane
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if(lane == m_WorkgroupIndex)
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break;
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ShaderVariable x;
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RDCASSERT(workgroup[lane].GetShaderVariable(inst.args[1], opCode, dxOpCode, x));
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switch(waveOpCode)
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{
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case WaveOpCode::Sum:
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{
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for(uint8_t c = 0; c < x.columns; c++)
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{
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if(isUnsigned)
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{
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#undef _IMPL
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#define _IMPL(I, S, U) comp<U>(accum, c) = comp<U>(accum, c) + comp<U>(x, c)
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IMPL_FOR_INT_TYPES_FOR_TYPE(_IMPL, x.type);
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}
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else
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{
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#undef _IMPL
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#define _IMPL(I, S, U) comp<S>(accum, c) = comp<S>(accum, c) + comp<S>(x, c)
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IMPL_FOR_INT_TYPES_FOR_TYPE(_IMPL, x.type);
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#undef _IMPL
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#define _IMPL(T) comp<T>(accum, c) = comp<T>(accum, c) + comp<T>(x, c)
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IMPL_FOR_FLOAT_TYPES_FOR_TYPE(_IMPL, x.type);
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}
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}
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break;
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}
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case WaveOpCode::Product:
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{
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for(uint8_t c = 0; c < x.columns; c++)
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{
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if(isUnsigned)
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{
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#undef _IMPL
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#define _IMPL(I, S, U) comp<U>(accum, c) = comp<U>(accum, c) * comp<U>(x, c)
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IMPL_FOR_INT_TYPES_FOR_TYPE(_IMPL, x.type);
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}
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else
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{
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#undef _IMPL
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#define _IMPL(I, S, U) comp<S>(accum, c) = comp<S>(accum, c) * comp<S>(x, c)
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IMPL_FOR_INT_TYPES_FOR_TYPE(_IMPL, x.type);
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#undef _IMPL
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#define _IMPL(T) comp<T>(accum, c) = comp<T>(accum, c) * comp<T>(x, c)
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IMPL_FOR_FLOAT_TYPES_FOR_TYPE(_IMPL, x.type);
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}
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}
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break;
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}
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default: RDCERR("Unhandled PrefixOp wave opcode"); break;
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}
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}
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result.value = accum.value;
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break;
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}
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case DXOp::WavePrefixBitCount:
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{
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// WavePrefixBitCount(cond)
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// determine active lane indices in our subgroup
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rdcarray<uint32_t> activeLanes;
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GetSubgroupActiveLanes(activeMask, workgroup, activeLanes);
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uint32_t count = 0;
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for(uint32_t lane : activeLanes)
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{
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// stop before processing our lane
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if(lane == m_WorkgroupIndex)
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break;
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ShaderVariable x;
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RDCASSERT(workgroup[lane].GetShaderVariable(inst.args[1], opCode, dxOpCode, x));
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count += x.value.u32v[0];
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}
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result.value.u32v[0] = count;
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break;
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}
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case DXOp::WaveAnyTrue:
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case DXOp::WaveAllTrue:
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case DXOp::WaveActiveBallot:
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case DXOp::WaveActiveOp:
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{
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ShaderVariable accum;
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ShaderVariable accum(result);
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bool isUnsigned = true;
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WaveOpCode waveOpCode = WaveOpCode::Sum;
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@@ -3743,11 +3918,12 @@ bool ThreadState::ExecuteInstruction(DebugAPIWrapper *apiWrapper,
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// set the identity
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switch(waveOpCode)
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{
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case WaveOpCode::Sum: SetShaderValueZero(accum); break;
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case WaveOpCode::Product: SetShaderValueOne(accum); break;
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default:
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RDCERR("Unhandled wave opcode");
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RDCERR("Unhandled ActiveOp wave opcode");
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accum.value = {};
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break;
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case WaveOpCode::Sum: accum.value = {}; break;
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}
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}
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else if(dxOpCode == DXOp::WaveAnyTrue)
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@@ -3775,7 +3951,6 @@ bool ThreadState::ExecuteInstruction(DebugAPIWrapper *apiWrapper,
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{
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switch(waveOpCode)
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{
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default: RDCERR("Unhandled wave opcode"); break;
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case WaveOpCode::Sum:
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{
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for(uint8_t c = 0; c < x.columns; c++)
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@@ -3800,6 +3975,7 @@ bool ThreadState::ExecuteInstruction(DebugAPIWrapper *apiWrapper,
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}
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break;
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}
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default: RDCERR("Unhandled ActiveOp wave opcode"); break;
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}
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}
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else if(dxOpCode == DXOp::WaveAnyTrue)
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@@ -4132,9 +4308,7 @@ bool ThreadState::ExecuteInstruction(DebugAPIWrapper *apiWrapper,
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// Wave Operations
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case DXOp::WaveActiveAllEqual:
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case DXOp::WaveActiveBit:
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case DXOp::WavePrefixOp:
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case DXOp::WaveAllBitCount:
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case DXOp::WavePrefixBitCount:
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case DXOp::WaveMatch:
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case DXOp::WaveMultiPrefixOp:
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case DXOp::WaveMultiPrefixBitCount:
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@@ -1879,6 +1879,8 @@ rdcstr Program::GetDebugStatus()
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case DXOp::WaveReadLaneAt:
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case DXOp::WaveReadLaneFirst:
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case DXOp::WaveActiveOp:
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case DXOp::WavePrefixOp:
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case DXOp::WavePrefixBitCount:
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if(!D3D_Hack_EnableGroups())
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return StringFormat::Fmt("Unsupported dx.op call `%s` %s", callFunc->name.c_str(),
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ToStr(dxOpCode).c_str());
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@@ -1905,9 +1907,7 @@ rdcstr Program::GetDebugStatus()
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case DXOp::CycleCounterLegacy:
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case DXOp::WaveActiveAllEqual:
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case DXOp::WaveActiveBit:
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case DXOp::WavePrefixOp:
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case DXOp::WaveAllBitCount:
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case DXOp::WavePrefixBitCount:
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case DXOp::AttributeAtVertex:
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case DXOp::InstanceID:
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case DXOp::InstanceIndex:
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