Update to RGA 2.2, support Navi (gfx1010)

* This requires an updated set of plugins for the RGA binary files.
2026-05-06 01:50:38 +00:00 · 2019-08-01 11:49:30 +01:00
parent 51c15d596f
commit 87e51658f0
8 changed files with 89 additions and 53 deletions
@@ -123,7 +123,7 @@
    <ClInclude Include="official\GPUPerfAPI\Include\IGPACounterAccessor.h" />
    <ClInclude Include="official\GPUPerfAPI\Include\IGPACounterScheduler.h" />
    <ClInclude Include="official\RGA\Common\AmdDxGsaCompile.h" />
-    <ClInclude Include="official\RGA\Common\asic_reg\devices.h" />
+    <ClInclude Include="official\RGA\Common\AsicReg\devices.h" />
    <ClInclude Include="official\RGA\elf\elf32.h" />
    <ClInclude Include="official\RGA\elf\elf_common.h" />
  </ItemGroup>
@@ -74,9 +74,6 @@
    <ClInclude Include="official\RGA\Common\AmdDxGsaCompile.h">
      <Filter>official\RGA\Common</Filter>
    </ClInclude>
-    <ClInclude Include="official\RGA\Common\asic_reg\devices.h">
-      <Filter>official\RGA\Common</Filter>
-    </ClInclude>
    <ClInclude Include="amd_isa_devices.h">
      <Filter>ISA</Filter>
    </ClInclude>
@@ -114,5 +111,8 @@
    <ClInclude Include="official\GPUPerfAPI\Include\IGPACounterScheduler.h">
      <Filter>official\GPUPerfAPI</Filter>
    </ClInclude>
+    <ClInclude Include="official\RGA\Common\AsicReg\devices.h">
+      <Filter>official\RGA\Common</Filter>
+    </ClInclude>
  </ItemGroup>
 </Project>
@@ -109,17 +109,10 @@ void GetTargets(GraphicsAPI api, std::vector<std::string> &targets)

  if(IsSupported(primary) || IsSupported(secondary))
  {
-    // OpenGL doesn't support AMDIL
-    if(api != GraphicsAPI::OpenGL)
-      targets.push_back("AMDIL");
-
-    int apiBitmask = 1 << (int)api;
+    targets.push_back("AMDIL");

    for(int i = 0; i < asicCount; i++)
-    {
-      if(asicInfo[i].apiBitmask & apiBitmask)
-        targets.push_back(asicInfo[i].name);
-    }
+      targets.push_back(asicInfo[i].name);
  }
  else
  {
@@ -296,6 +289,7 @@ std::string DisassembleGLSL(ShaderStage stage, const bytebuf &shaderBytes, const
  std::string outPath = StringFormat::Fmt("%sout.txt", tempPath.c_str());
  std::string binPath = StringFormat::Fmt("%sout.bin", tempPath.c_str());
  std::string statsPath = StringFormat::Fmt("%sstats.txt", tempPath.c_str());
+  std::string ilPath = StringFormat::Fmt("%sil.txt", tempPath.c_str());

  std::string cmdLine = "\"";

@@ -332,6 +326,13 @@ std::string DisassembleGLSL(ShaderStage stage, const bytebuf &shaderBytes, const
    }
  }

+  // dummy values
+  if(!found)
+  {
+    const asic &a = asicInfo[0];
+    cmdLine += StringFormat::Fmt("%d;%d;", a.chipFamily, a.chipRevision);
+  }
+
  // input files
  for(int i = 0; i < 6; i++)
  {
@@ -341,11 +342,26 @@ std::string DisassembleGLSL(ShaderStage stage, const bytebuf &shaderBytes, const
    cmdLine += ';';
  }

+  cmdLine += ";\"";
+
+  // amdil files
+  for(int i = 0; i < 6; i++)
+  {
+    if(i == stageIndex)
+      cmdLine += ilPath;
+
+    cmdLine += ';';
+  }
+
+  if(!found && target == "AMDIL")
+  {
+    outPath = ilPath;
+    found = true;
+  }
+
  if(!found)
    return "; Invalid ISA Target specified";

-  cmdLine += ";\"";
-
  FileIO::dump(inPath.c_str(), shaderBytes.data(), shaderBytes.size());

  // try to locate the amdspv relative to our running program
@@ -371,6 +387,9 @@ std::string DisassembleGLSL(ShaderStage stage, const bytebuf &shaderBytes, const
    FileIO::slurp(outPath.c_str(), data);
    ret = std::string(data.data(), data.data() + data.size());

+    while(ret.back() == '\0')
+      ret.pop_back();
+
    if(FileIO::exists(statsPath.c_str()))
    {
      FileIO::slurp(statsPath.c_str(), data);
@@ -24,43 +24,39 @@

 #include "amd_isa_devices.h"
 #include "common/common.h"
-#include "official/RGA/Common/asic_reg/devices.h"
-
-static constexpr int allAPIs = (1 << (int)GraphicsAPI::D3D11) | (1 << (int)GraphicsAPI::D3D12) |
-                               (1 << (int)GraphicsAPI::Vulkan) | (1 << (int)GraphicsAPI::OpenGL);
-
-// gfx900 isn't currently supported on GL
-static constexpr int notOpenGL = (1 << (int)GraphicsAPI::D3D11) | (1 << (int)GraphicsAPI::D3D12) |
-                                 (1 << (int)GraphicsAPI::Vulkan);
+#include "official/RGA/Common/AsicReg/devices.h"

 const GCNISA::asic GCNISA::asicInfo[] = {
    // Southern Islands
-    {"GCN (Tahiti)", "6", FAMILY_SI, SI_TAHITI_P_B1, allAPIs},
-    {"GCN (Pitcairn)", "6", FAMILY_SI, SI_PITCAIRN_PM_A1, allAPIs},
-    {"GCN (Capeverde)", "6", FAMILY_SI, SI_CAPEVERDE_M_A1, allAPIs},
-    {"GCN (Oland)", "6", FAMILY_SI, SI_OLAND_M_A0, allAPIs},
-    {"GCN (Hainan)", "6", FAMILY_SI, SI_HAINAN_V_A0, allAPIs},
+    {"GCN (Tahiti)", "6", FAMILY_SI, SI_TAHITI_P_B1, "gfx600"},
+    {"GCN (Pitcairn)", "6", FAMILY_SI, SI_PITCAIRN_PM_A1, "gfx601"},
+    {"GCN (Capeverde)", "6", FAMILY_SI, SI_CAPEVERDE_M_A1, "gfx601"},
+    {"GCN (Oland)", "6", FAMILY_SI, SI_OLAND_M_A0, "gfx601"},
+    {"GCN (Hainan)", "6", FAMILY_SI, SI_HAINAN_V_A0, "gfx601"},
    // Sea Islands
-    {"GCN (Bonaire)", "7", FAMILY_CI, CI_BONAIRE_M_A0, allAPIs},
-    {"GCN (Hawaii)", "7", FAMILY_CI, CI_HAWAII_P_A0, allAPIs},
-    {"GCN (Spectre)", "7", FAMILY_CI, KV_SPECTRE_A0, allAPIs},
-    {"GCN (Spooky)", "7", FAMILY_CI, KV_SPOOKY_A0, allAPIs},
-    {"GCN (Kalindi)", "7.x", FAMILY_CI, CI_BONAIRE_M_A0, allAPIs},
-    {"GCN (Mullins)", "7", FAMILY_CI, CI_BONAIRE_M_A0, allAPIs},
+    {"GCN (Bonaire)", "7", FAMILY_CI, CI_BONAIRE_M_A0, "gfx704"},
+    {"GCN (Hawaii)", "7", FAMILY_CI, CI_HAWAII_P_A0, "gfx701"},
+    {"GCN (Spectre)", "7", FAMILY_CI, KV_SPECTRE_A0, "gfx700"},
+    {"GCN (Spooky)", "7", FAMILY_CI, KV_SPOOKY_A0, "gfx700"},
+    {"GCN (Kalindi)", "7.x", FAMILY_CI, CI_BONAIRE_M_A0, "gfx703"},
+    {"GCN (Mullins)", "7", FAMILY_CI, CI_BONAIRE_M_A0, "gfx704"},
    // Volcanic Islands
-    {"GCN (Iceland)", "8", FAMILY_VI, VI_ICELAND_M_A0, allAPIs},
-    {"GCN (Tonga)", "8", FAMILY_VI, VI_TONGA_P_A0, allAPIs},
-    {"GCN (Carrizo)", "8", FAMILY_VI, CARRIZO_A0, allAPIs},
-    {"GCN (Bristol Ridge)", "8", FAMILY_VI, CARRIZO_A0, allAPIs},
-    {"GCN (Carrizo)", "8", FAMILY_VI, CARRIZO_A0, allAPIs},
-    {"GCN (Fiji)", "8", FAMILY_VI, VI_FIJI_P_A0, allAPIs},
-    {"GCN (Stoney)", "8.1", FAMILY_VI, STONEY_A0, allAPIs},
-    {"GCN (Ellesmere)", "8", FAMILY_VI, VI_ELLESMERE_P_A0, allAPIs},
-    {"GCN (Baffin)", "8", FAMILY_VI, VI_BAFFIN_M_A0, allAPIs},
-    {"GCN (gfx804)", "8", FAMILY_VI, VI_LEXA_V_A0, allAPIs},
+    {"GCN (Iceland)", "8", FAMILY_VI, VI_ICELAND_M_A0, "gfx802"},
+    {"GCN (Tonga)", "8", FAMILY_VI, VI_TONGA_P_A0, "gfx802"},
+    {"GCN (Carrizo)", "8", FAMILY_VI, CARRIZO_A0, "gfx801"},
+    {"GCN (Bristol Ridge)", "8", FAMILY_VI, CARRIZO_A0, "gfx801"},
+    {"GCN (Carrizo)", "8", FAMILY_VI, CARRIZO_A0, "gfx801"},
+    {"GCN (Fiji)", "8", FAMILY_VI, VI_FIJI_P_A0, "gfx803"},
+    {"GCN (Stoney)", "8.1", FAMILY_VI, STONEY_A0, "gfx810"},
+    {"GCN (Ellesmere)", "8", FAMILY_VI, VI_ELLESMERE_P_A0, "gfx803"},
+    {"GCN (Baffin)", "8", FAMILY_VI, VI_BAFFIN_M_A0, "gfx803"},
+    {"GCN (gfx804)", "8", FAMILY_VI, VI_LEXA_V_A0, "gfx804"},
    // Arctic Islands
-    {"GCN (gfx900)", "900", FAMILY_AI, AI_GD_P0, notOpenGL},
-    {"GCN (gfx902)", "902", FAMILY_AI, AI_GD_P0, notOpenGL},
+    {"GCN (gfx900)", "900", FAMILY_AI, AI_GD_P0, "gfx900"},
+    {"GCN (gfx902)", "902", FAMILY_AI, AI_GD_P0, "gfx902"},
+    {"GCN (Vega 20)", "906", FAMILY_AI, AI_VEGA20_P_A0, "gfx906"},
+    // Navi
+    {"RDNA (Navi 10)", "1010", FAMILY_NV, NV_NAVI10_P_A0, "gfx1010"},
 };

 RDCCOMPILE_ASSERT(ARRAY_COUNT(GCNISA::asicInfo) == GCNISA::asicCount, "Mismatched array count");
@@ -32,10 +32,10 @@ struct asic
  const char *gfxIpString;
  int chipFamily;
  int chipRevision;
-  int apiBitmask;
+  const char *targetName;
 };

-const int asicCount = 23;
+const int asicCount = 25;
 extern const asic asicInfo[];

 };    // namespace GCNISA
@@ -59,6 +59,20 @@ static HMODULE GetAMDModule()
  return module;
 }

+void SafelyCompile(PfnAmdDxGsaCompileShader compileShader, AmdDxGsaCompileShaderInput &in,
+                   AmdDxGsaCompileShaderOutput &out)
+{
+  __try
+  {
+    compileShader(&in, &out);
+  }
+  __except(EXCEPTION_EXECUTE_HANDLER)
+  {
+    out.pShaderBinary = NULL;
+    out.shaderBinarySize = 0;
+  }
+}
+
 std::string DisassembleDXBC(const bytebuf &shaderBytes, const std::string &target)
 {
  HMODULE mod = GetAMDModule();
@@ -175,7 +189,7 @@ std::string DisassembleDXBC(const bytebuf &shaderBytes, const std::string &targe

  out.size = sizeof(out);

-  compileShader(&in, &out);
+  SafelyCompile(compileShader, in, out);

  if(out.pShaderBinary == NULL || out.shaderBinarySize < 16)
    return "; Failed to disassemble shader";
@@ -108,10 +108,15 @@ enum {
 };

 enum {
-    AI_GD_P0 = 1,
-    AI_GD_P1 = 2,
+    NV_NAVI10_P_A0 = 1
+};

-    AI_UNKNOWN = 0xFF
+enum {
+    AI_GD_P0       = 1,
+    AI_GD_P1       = 2,
+    AI_VEGA12_P_A0 = 20,
+    AI_VEGA20_P_A0 = 40,
+    AI_UNKNOWN     = 0xFF
 };

 #ifndef _ATIID_H
@@ -137,6 +142,8 @@ enum {

 #define FAMILY_AI                      141

+#define FAMILY_NV                      143
+
 #define ATI_VENDOR_ID                   0x1002


@@ -1,2 +1,2 @@
-Taken from https://github.com/GPUOpen-Tools/RGA in RadeonGPUAnalyzerBackend/include @ 1507bb1ddbca5872fd5e30f7a26240fe674f428f
+Taken from https://github.com/GPUOpen-Tools/RGA in RadeonGPUAnalyzerBackend/include @ a13f242b3ce6dc9e49904c648b2552c9f80ddc6c