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https://github.com/baldurk/renderdoc.git
synced 2026-05-12 13:00:32 +00:00
Handle extract/insert/shuffle vector and aggregate operations
* DXIL supposedly won't use these, but handle them just in case
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@@ -1561,7 +1561,8 @@ Program::Program(const byte *bytes, size_t length)
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}
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}
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RDCASSERT(inst.type->type == argType->type);
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RDCASSERT(inst.type->type == argType->type &&
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inst.type->elemCount == argType->elemCount);
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m_Symbols.push_back({SymbolType::Instruction, f.instructions.size()});
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@@ -1587,13 +1588,123 @@ Program::Program(const byte *bytes, size_t length)
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f.instructions.push_back(inst);
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}
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else if(IS_KNOWN(op.id, FunctionRecord::INST_EXTRACTELT))
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{
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// DXIL claims to be scalarised so should this appear?
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RDCWARN("Unexpected vector instruction extractelement in DXIL");
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Instruction inst;
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inst.op = Instruction::ExtractElement;
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// vector
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inst.args.push_back(getSymbol(op.ops[0]));
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// index
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inst.args.push_back(getSymbol(op.ops[1]));
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// result is the scalar type within the vector
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inst.type = GetSymbolType(f, inst.args[0])->inner;
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m_Symbols.push_back({SymbolType::Instruction, f.instructions.size()});
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f.instructions.push_back(inst);
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}
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else if(IS_KNOWN(op.id, FunctionRecord::INST_INSERTELT))
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{
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// DXIL claims to be scalarised so should this appear?
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RDCWARN("Unexpected vector instruction insertelement in DXIL");
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Instruction inst;
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inst.op = Instruction::InsertElement;
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// vector
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inst.args.push_back(getSymbol(op.ops[0]));
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// replacement element
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inst.args.push_back(getSymbol(op.ops[1]));
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// index
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inst.args.push_back(getSymbol(op.ops[2]));
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// result is the vector type
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inst.type = GetSymbolType(f, inst.args[0]);
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m_Symbols.push_back({SymbolType::Instruction, f.instructions.size()});
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f.instructions.push_back(inst);
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}
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else if(IS_KNOWN(op.id, FunctionRecord::INST_SHUFFLEVEC))
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{
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// DXIL claims to be scalarised so should this appear?
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RDCWARN("Unexpected vector instruction shufflevector in DXIL");
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Instruction inst;
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inst.op = Instruction::ShuffleVector;
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// vector 1
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inst.args.push_back(getSymbol(op.ops[0]));
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// vector 2
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inst.args.push_back(getSymbol(op.ops[1]));
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// indexes
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inst.args.push_back(getSymbol(op.ops[2]));
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// result is a vector with the inner type of the first two vectors and the element
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// count of the last vector
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const Type *vecType = GetSymbolType(f, inst.args[0]);
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const Type *maskType = GetSymbolType(f, inst.args[2]);
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for(const Type &t : m_Types)
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{
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if(t.type == Type::Vector && t.inner == vecType->inner &&
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t.elemCount == maskType->elemCount)
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{
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inst.type = &t;
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break;
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}
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}
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RDCASSERT(inst.type);
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m_Symbols.push_back({SymbolType::Instruction, f.instructions.size()});
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f.instructions.push_back(inst);
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}
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else if(IS_KNOWN(op.id, FunctionRecord::INST_INSERTVAL))
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{
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// DXIL claims to be scalarised so should this appear?
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RDCWARN("Unexpected aggregate instruction insertvalue in DXIL");
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Instruction inst;
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inst.op = Instruction::InsertValue;
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// aggregate
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inst.args.push_back(getSymbol(op.ops[0]));
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// replacement element
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inst.args.push_back(getSymbol(op.ops[1]));
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// indices as literals
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for(size_t a = 2; a < op.ops.size(); a++)
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inst.args.push_back(Symbol(SymbolType::Literal, op.ops[a]));
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// result is the aggregate type
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inst.type = GetSymbolType(f, inst.args[0]);
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m_Symbols.push_back({SymbolType::Instruction, f.instructions.size()});
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f.instructions.push_back(inst);
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}
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else if(IS_KNOWN(op.id, FunctionRecord::INST_VAARG))
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{
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// don't expect vararg instructions
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RDCERR("Unexpected vararg instruction %u in DXIL", op.id);
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}
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else if(IS_KNOWN(op.id, FunctionRecord::INST_LANDINGPAD) ||
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IS_KNOWN(op.id, FunctionRecord::INST_LANDINGPAD_OLD) ||
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IS_KNOWN(op.id, FunctionRecord::INST_VAARG) ||
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IS_KNOWN(op.id, FunctionRecord::INST_INVOKE) ||
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IS_KNOWN(op.id, FunctionRecord::INST_RESUME))
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{
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RDCERR("Unexpected instruction %u in DXIL", op.id);
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// don't expect exception handling instructions
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RDCERR("Unexpected exception handling instruction %u in DXIL", op.id);
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}
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else
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{
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@@ -363,6 +363,10 @@ struct Instruction
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SLess,
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SLessEqual,
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Select,
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ExtractElement,
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InsertElement,
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ShuffleVector,
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InsertValue,
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} op = Unknown;
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InstructionFlags opFlags = InstructionFlags::NoFlags;
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@@ -734,6 +734,46 @@ void Program::MakeDisassemblyString()
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m_Disassembly += argToString(inst.args[1], true);
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break;
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}
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case Instruction::ExtractElement:
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{
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m_Disassembly += "extractelement ";
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m_Disassembly += argToString(inst.args[0], true);
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m_Disassembly += ", ";
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m_Disassembly += argToString(inst.args[1], true);
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break;
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}
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case Instruction::InsertElement:
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{
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m_Disassembly += "insertelement ";
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m_Disassembly += argToString(inst.args[0], true);
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m_Disassembly += ", ";
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m_Disassembly += argToString(inst.args[1], true);
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m_Disassembly += ", ";
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m_Disassembly += argToString(inst.args[2], true);
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break;
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}
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case Instruction::ShuffleVector:
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{
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m_Disassembly += "shufflevector ";
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m_Disassembly += argToString(inst.args[0], true);
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m_Disassembly += ", ";
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m_Disassembly += argToString(inst.args[1], true);
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m_Disassembly += ", ";
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m_Disassembly += argToString(inst.args[2], true);
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break;
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}
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case Instruction::InsertValue:
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{
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m_Disassembly += "insertvalue ";
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m_Disassembly += argToString(inst.args[0], true);
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m_Disassembly += ", ";
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m_Disassembly += argToString(inst.args[1], true);
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for(size_t a = 2; a < inst.args.size(); a++)
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{
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m_Disassembly += ", " + ToStr(inst.args[2].idx);
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}
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break;
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}
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}
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if(inst.debugLoc != ~0U)
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