mirror of
https://github.com/baldurk/renderdoc.git
synced 2026-09-15 10:15:48 +00:00
Add helper for checking vertex debugging matches postvs
* There are a few 'extras' here as the uses aren't quite uniform, but they are close enough it makes sense to have a common helper
This commit is contained in:
baldurk
@@ -121,7 +121,7 @@ class Draw_Zoo(rdtest.TestCase):
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idx = vsout_ref[vtx]['idx']
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self.check_debug(vtx, idx, inst, postvs)
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self.check_vertex_debug(vtx, idx, inst, postvs)
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else:
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rdtest.log.print('Not checking shader debugging, unsupported')
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@@ -136,41 +136,6 @@ class Draw_Zoo(rdtest.TestCase):
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rdtest.log.success("Checked action {}".format(action.eventId))
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def check_debug(self, vtx, idx, inst, postvs):
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trace: rd.ShaderDebugTrace = self.controller.DebugVertex(vtx, inst, idx, 0)
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if trace.debugger is None:
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self.controller.FreeTrace(trace)
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raise rdtest.TestFailureException("Couldn't debug vertex {} in instance {}".format(vtx, inst))
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cycles, variables = self.process_trace(trace)
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for var in trace.sourceVars:
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var: rd.SourceVariableMapping
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if var.variables[0].type == rd.DebugVariableType.Variable and var.signatureIndex >= 0:
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name = var.name
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if name not in postvs[vtx].keys():
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raise rdtest.TestFailureException("Don't have expected output for {}".format(name))
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expect = postvs[vtx][name]
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value = self.evaluate_source_var(var, variables)
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if len(expect) != value.columns:
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raise rdtest.TestFailureException(
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"Output {} at vert {} (idx {}) instance {} has different size ({} values) to expectation ({} values)"
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.format(name, vtx, idx, inst, value.columns, len(expect)))
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debugged = value.value.f32v[0:value.columns]
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if not rdtest.value_compare(expect, debugged):
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raise rdtest.TestFailureException(
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"Debugged value {} at vert {} (idx {}) instance {}: {} doesn't exactly match postvs output {}".format(
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name, vtx, idx, inst, debugged, expect))
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rdtest.log.success('Successfully debugged vertex {} in instance {}'
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.format(vtx, inst))
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def check_capture(self):
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test_marker: rd.ActionDescription = self.find_action("Test")
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self.check_capture_action(test_marker)
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@@ -536,6 +536,84 @@ class TestCase:
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log.success("Simple triangle is as expected")
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def check_vertex_debug(
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self,
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vtx: int,
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idx: int,
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inst: int,
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postvs: analyse.MeshData,
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*,
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view=-1,
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eps=util.FLT_EPSILON,
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single_postvs=False,
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ignore_uninit=False,
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name_retry: Callable[[str], str] | None = None
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):
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trace = self.controller.DebugVertex(vtx, inst, idx, max(0, view))
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ctx = f"vertex {vtx} (idx {idx}) instance {inst}"
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if view >= 0:
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ctx += f" view {view}"
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if trace.debugger is None:
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self.controller.FreeTrace(trace)
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raise TestFailureException(f"Couldn't debug {ctx}")
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try:
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cycles, variables = self.process_trace(trace)
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postvs_vtx = vtx
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if single_postvs:
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postvs_vtx = 0
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for var in trace.sourceVars:
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if var.variables[0].type == rd.DebugVariableType.Variable and var.signatureIndex >= 0:
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name = var.name
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if name not in postvs[postvs_vtx].keys() and name_retry is not None:
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name = name_retry(name)
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if name not in postvs[postvs_vtx].keys():
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raise TestFailureException(f"Don't have expected output for {name}")
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expect = postvs[postvs_vtx][name]
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assert expect is not None
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value = self.evaluate_source_var(var, variables)
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expect_cols = 1
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if util.is_vector(expect):
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expect_cols = len(expect)
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if expect_cols != value.columns:
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raise TestFailureException(
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f"Output {name} at {ctx} has different size ({value.columns} values) to expectation ({expect_cols} values)")
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compType = rd.VarTypeCompType(value.type)
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debugged: util.VectorValue = []
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if compType == rd.CompType.UInt:
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debugged = list(value.value.u32v[0:value.columns])
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elif compType == rd.CompType.SInt:
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debugged = list(value.value.s32v[0:value.columns])
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else:
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debugged = list(value.value.f32v[0:value.columns])
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# For now, ignore debugged values that are uninitialised. This is an application bug but it causes false
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# reports of problems
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if ignore_uninit and value.columns > 1:
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assert util.is_vector(expect)
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for comp in range(4):
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if value.value.u32v[comp] == 0xcccccccc:
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debugged[comp] = expect[comp]
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is_eq, diff_amt = util.value_compare_diff(expect, debugged, eps=5.0E-06)
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if not is_eq:
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raise TestFailureException(
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f"Debugged value {name} at {ctx}: {debugged} doesn't exactly match postvs output {expect}. {diff_amt} difference")
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log.success(f'Successfully debugged vertex {ctx} in {cycles} cycles')
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finally:
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self.controller.FreeTrace(trace)
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def run(self):
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self.capture_filename = self.get_capture()
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@@ -97,65 +97,14 @@ class GL_Shader_Debug_Zoo(rdtest.TestCase):
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postvs = self.get_postvs(action, rd.MeshDataStage.VSOut, first_index=vtx, num_indices=1, instance=inst)
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trace: rd.ShaderDebugTrace = self.controller.DebugVertex(vtx, inst, idx, 0)
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if trace.debugger is None:
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try:
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self.check_vertex_debug(vtx, idx, inst, postvs, single_postvs=True, name_retry = lambda x: x.replace(".", "Block."))
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except rdtest.TestFailureException as err:
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failed = True
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rdtest.log.error("Test {} in sub-section {} did not debug vertex".format(test, child))
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self.controller.FreeTrace(trace)
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rdtest.log.error(f"Error debugging vertex at test {test} in sub-section {child}: {err.message}")
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continue
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_, variables = self.process_trace(trace)
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outputs = 0
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for var in trace.sourceVars:
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var: rd.SourceVariableMapping
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if var.variables[0].type == rd.DebugVariableType.Variable and var.signatureIndex >= 0:
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name = var.name
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if name not in postvs[0].keys():
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name = name.replace(".", "Block.")
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if name not in postvs[0].keys():
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failed = True
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rdtest.log.error("Don't have expected output for {}".format(name))
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continue
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expect = postvs[0][name]
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value = self.evaluate_source_var(var, variables)
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if len(expect) != value.columns:
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failed = True
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rdtest.log.error(
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"Output {} at EID {} has different size ({} values) to expectation ({} values)"
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.format(name, action.eventId, value.columns, len(expect)))
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continue
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compType = rd.VarTypeCompType(value.type)
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if compType == rd.CompType.UInt:
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debugged = list(value.value.u32v[0:value.columns])
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elif compType == rd.CompType.SInt:
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debugged = list(value.value.s32v[0:value.columns])
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else:
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debugged = list(value.value.f32v[0:value.columns])
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if not rdtest.value_compare(expect, debugged):
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failed = True
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rdtest.log.error("Test {} in sub-section {} did not match vertex.\nExpected {} but got {}".format(test, child, expect, debugged))
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break
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is_eq, diff_amt = rdtest.value_compare_diff(expect, debugged, eps=5.0E-06)
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if not is_eq:
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failed = True
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rdtest.log.error(
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"Debugged value {} at EID {} vert {} (idx {}) instance {}: {} difference. {} doesn't exactly match postvs output {}".format(
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name, action.eventId, vtx, idx, inst, diff_amt, debugged, expect))
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outputs = outputs + 1
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self.controller.FreeTrace(trace)
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rdtest.log.success("Test {} vertex in sub-section {} matched as expected".format(test, child))
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rdtest.log.success(f"Test {test} vertex in sub-section {child} matched as expected")
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rdtest.log.end_section(child)
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@@ -152,70 +152,12 @@ class Iter_Test(rdtest.TestCase):
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postvs = self.get_postvs(action, rd.MeshDataStage.VSOut, first_index=vtx, num_indices=1, instance=inst)
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trace: rd.ShaderDebugTrace = self.controller.DebugVertex(vtx, inst, idx, 0)
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if trace.debugger is None:
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self.controller.FreeTrace(trace)
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rdtest.log.print("No debug result")
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return
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try:
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cycles, variables = self.process_trace(trace)
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self.check_vertex_debug(vtx, idx, inst, postvs, eps=5.0E-06, single_postvs=True, ignore_uninit=True)
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except rdtest.TestFailureException as err:
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rdtest.log.error(f"Error debugging: {err.message}")
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return
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outputs = 0
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for var in trace.sourceVars:
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var: rd.SourceVariableMapping
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if var.variables[0].type == rd.DebugVariableType.Variable and var.signatureIndex >= 0:
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name = var.name
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if name not in postvs[0].keys():
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rdtest.log.error("Don't have expected output for {}".format(name))
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continue
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expect = postvs[0][name]
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value = self.evaluate_source_var(var, variables)
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if len(expect) != value.columns:
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rdtest.log.error(
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"Output {} at EID {} has different size ({} values) to expectation ({} values)"
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.format(name, action.eventId, value.columns, len(expect)))
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continue
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compType = rd.VarTypeCompType(value.type)
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if compType == rd.CompType.UInt:
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debugged = list(value.value.u32v[0:value.columns])
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elif compType == rd.CompType.SInt:
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debugged = list(value.value.s32v[0:value.columns])
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else:
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debugged = list(value.value.f32v[0:value.columns])
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# For now, ignore debugged values that are uninitialised. This is an application bug but it causes false
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# reports of problems
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for comp in range(4):
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if value.value.u32v[comp] == 0xcccccccc:
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debugged[comp] = expect[comp]
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# Unfortunately we can't ever trust that we should get back a matching results, because some shaders
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# rely on undefined/inaccurate maths that we don't emulate.
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# So the best we can do is log an error for manual verification
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is_eq, diff_amt = rdtest.value_compare_diff(expect, debugged, eps=5.0E-06)
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if not is_eq:
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rdtest.log.error(
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"Debugged value {} at EID {} vert {} (idx {}) instance {}: {} difference. {} doesn't exactly match postvs output {}".format(
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name, action.eventId, vtx, idx, inst, diff_amt, debugged, expect))
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outputs = outputs + 1
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rdtest.log.success('Successfully debugged vertex in {} cycles, {}/{} outputs match'
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.format(cycles, outputs, len(refl.outputSignature)))
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self.controller.FreeTrace(trace)
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def pixel_debug(self, action: rd.ActionDescription):
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pipe: rd.PipeState = self.controller.GetPipelineState()
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@@ -76,51 +76,7 @@ class VK_Graphics_Pipeline(rdtest.TestCase):
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raise rdtest.TestFailureException(
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f"Graphics bind 0[15] isn't the accessed descriptor {str(rd.DumpObject(access))}")
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trace = self.controller.DebugVertex(0, 0, 0, 0)
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if trace.debugger is None:
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raise rdtest.TestFailureException("No vertex debug result")
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cycles, variables = self.process_trace(trace)
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outputs = 0
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for var in trace.sourceVars:
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var: rd.SourceVariableMapping
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if var.variables[0].type == rd.DebugVariableType.Variable and var.signatureIndex >= 0:
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name = var.name
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if name not in postvs_data[0].keys():
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raise rdtest.TestFailureException("Don't have expected output for {}".format(name))
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expect = postvs_data[0][name]
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value = self.evaluate_source_var(var, variables)
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if len(expect) != value.columns:
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raise rdtest.TestFailureException(
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"Vertex output {} has different size ({} values) to expectation ({} values)".format(
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name, action.eventId, value.columns, len(expect)))
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compType = rd.VarTypeCompType(value.type)
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if compType == rd.CompType.UInt:
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debugged = list(value.value.u32v[0:value.columns])
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elif compType == rd.CompType.SInt:
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debugged = list(value.value.s32v[0:value.columns])
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else:
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debugged = list(value.value.f32v[0:value.columns])
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is_eq, diff_amt = rdtest.value_compare_diff(expect, debugged, eps=5.0E-06)
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if not is_eq:
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rdtest.log.error(
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"Debugged vertex output value {}: {} difference. {} doesn't exactly match postvs output {}".
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format(name, action.eventId, diff_amt, debugged, expect))
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outputs = outputs + 1
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rdtest.log.success('Successfully debugged vertex in {} cycles, {}/{} outputs match'.format(
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cycles, outputs, len(vsrefl.outputSignature)))
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self.controller.FreeTrace(trace)
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self.check_vertex_debug(0, 0, 0, postvs_data)
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history = self.controller.PixelHistory(pipe.GetOutputTargets()[0].resource, 200, 150, rd.Subresource(0, 0, 0),
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rd.CompType.Typeless)
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@@ -42,43 +42,6 @@ class VK_KHR_Buffer_Address(rdtest.TestCase):
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postvs = self.get_postvs(action, rd.MeshDataStage.VSOut, instance=inst)
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for vtx in range(action.numIndices):
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idx = vtx
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self.check_debug(vtx, idx, inst, postvs)
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self.check_vertex_debug(vtx, idx, inst, postvs)
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rdtest.log.success("All tests matched")
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def check_debug(self, vtx, idx, inst, postvs):
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trace: rd.ShaderDebugTrace = self.controller.DebugVertex(vtx, inst, idx, 0)
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if trace.debugger is None:
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self.controller.FreeTrace(trace)
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raise rdtest.TestFailureException("Couldn't debug vertex {} in instance {}".format(vtx, inst))
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cycles, variables = self.process_trace(trace)
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for var in trace.sourceVars:
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var: rd.SourceVariableMapping
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if var.variables[0].type == rd.DebugVariableType.Variable and var.signatureIndex >= 0:
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name = var.name
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if name not in postvs[vtx].keys():
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raise rdtest.TestFailureException("Don't have expected output for {}".format(name))
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expect = postvs[vtx][name]
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value = self.evaluate_source_var(var, variables)
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if len(expect) != value.columns:
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raise rdtest.TestFailureException(
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"Output {} at vert {} (idx {}) instance {} has different size ({} values) to expectation ({} values)"
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.format(name, vtx, idx, inst, value.columns, len(expect)))
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debugged = value.value.f32v[0:value.columns]
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if not rdtest.value_compare(expect, debugged):
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raise rdtest.TestFailureException(
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"Debugged value {} at vert {} (idx {}) instance {}: {} doesn't exactly match postvs output {}".format(
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name, vtx, idx, inst, debugged, expect))
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rdtest.log.success('Successfully debugged vertex {} in instance {}'
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.format(vtx, inst))
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@@ -36,51 +36,7 @@ class VK_Multi_Entry(rdtest.TestCase):
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postvs = self.get_postvs(action, rd.MeshDataStage.VSOut, first_index=0, num_indices=1, instance=0)
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trace: rd.ShaderDebugTrace = self.controller.DebugVertex(0, 0, 0, 0)
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if trace.debugger is None:
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raise rdtest.TestFailureException("No vertex debug result")
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cycles, variables = self.process_trace(trace)
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outputs = 0
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for var in trace.sourceVars:
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var: rd.SourceVariableMapping
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if var.variables[0].type == rd.DebugVariableType.Variable and var.signatureIndex >= 0:
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name = var.name
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if name not in postvs[0].keys():
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raise rdtest.TestFailureException("Don't have expected output for {}".format(name))
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expect = postvs[0][name]
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value = self.evaluate_source_var(var, variables)
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if len(expect) != value.columns:
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raise rdtest.TestFailureException(
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"Vertex output {} has different size ({} values) to expectation ({} values)".format(
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name, action.eventId, value.columns, len(expect)))
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compType = rd.VarTypeCompType(value.type)
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if compType == rd.CompType.UInt:
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debugged = list(value.value.u32v[0:value.columns])
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elif compType == rd.CompType.SInt:
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debugged = list(value.value.s32v[0:value.columns])
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else:
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debugged = list(value.value.f32v[0:value.columns])
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is_eq, diff_amt = rdtest.value_compare_diff(expect, debugged, eps=5.0E-06)
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if not is_eq:
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rdtest.log.error(
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"Debugged vertex output value {}: {} difference. {} doesn't exactly match postvs output {}".
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format(name, action.eventId, diff_amt, debugged, expect))
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outputs = outputs + 1
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rdtest.log.success('Successfully debugged vertex in {} cycles, {}/{} outputs match'.format(
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cycles, outputs, len(refl.outputSignature)))
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self.controller.FreeTrace(trace)
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self.check_vertex_debug(0, 0, 0, postvs, single_postvs=True)
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history = self.controller.PixelHistory(pipe.GetOutputTargets()[0].resource, 200, 150, rd.Subresource(0, 0, 0),
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rd.CompType.Typeless)
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@@ -45,7 +45,7 @@ class VK_Multi_View(rdtest.TestCase):
|
||||
postvs = self.get_postvs(action, rd.MeshDataStage.VSOut, instance=inst, view=view)
|
||||
for vtx in range(action.numIndices):
|
||||
idx = vtx
|
||||
self.check_debug(vtx, idx, inst, view, postvs)
|
||||
self.check_vertex_debug(vtx, idx, inst, postvs, view=view)
|
||||
rdtest.log.print(f"View {view} Slice {slice} passed")
|
||||
|
||||
for test_name in ["viewportIndex choice"]:
|
||||
@@ -86,49 +86,9 @@ class VK_Multi_View(rdtest.TestCase):
|
||||
postvs = self.get_postvs(action, rd.MeshDataStage.VSOut, instance=inst, view=view)
|
||||
for vtx in range(action.numIndices):
|
||||
idx = vtx
|
||||
self.check_debug(vtx, idx, inst, view, postvs)
|
||||
self.check_vertex_debug(vtx, idx, inst, postvs, view=view)
|
||||
rdtest.log.print(f"View {view} Slice {slice} passed")
|
||||
|
||||
rdtest.log.success("All tests matched")
|
||||
|
||||
|
||||
def check_debug(self, vtx, idx, inst, view, postvs):
|
||||
trace: rd.ShaderDebugTrace = self.controller.DebugVertex(vtx, inst, idx, view)
|
||||
|
||||
if trace.debugger is None:
|
||||
self.controller.FreeTrace(trace)
|
||||
|
||||
raise rdtest.TestFailureException("Couldn't debug vertex {} in instance {} for view {}".format(vtx, inst, view))
|
||||
|
||||
cycles, variables = self.process_trace(trace)
|
||||
|
||||
for var in trace.sourceVars:
|
||||
var: rd.SourceVariableMapping
|
||||
if var.variables[0].type == rd.DebugVariableType.Variable and var.signatureIndex >= 0:
|
||||
name = var.name
|
||||
|
||||
if name not in postvs[vtx].keys():
|
||||
raise rdtest.TestFailureException("Don't have expected output for {}".format(name))
|
||||
|
||||
expect = postvs[vtx][name]
|
||||
value = self.evaluate_source_var(var, variables)
|
||||
|
||||
if len(expect) != value.columns:
|
||||
raise rdtest.TestFailureException(
|
||||
"Output {} at vert {} (idx {}) instance {} view {} has different size ({} values) to expectation ({} values)"
|
||||
.format(name, vtx, idx, inst, view, value.columns, len(expect)))
|
||||
|
||||
if value.type == rd.VarType.SInt:
|
||||
debugged = value.value.s32v[0:value.columns]
|
||||
elif value.type == rd.VarType.UInt:
|
||||
debugged = value.value.u32v[0:value.columns]
|
||||
else:
|
||||
debugged = value.value.f32v[0:value.columns]
|
||||
|
||||
if not rdtest.value_compare(expect, debugged):
|
||||
raise rdtest.TestFailureException(
|
||||
"Debugged value {} at vert {} (idx {}) instance {} view {}: {} doesn't exactly match postvs output {}".format(
|
||||
name, vtx, idx, inst, view, debugged, expect))
|
||||
rdtest.log.success('Successfully debugged vertex {} in instance {} for view {}'
|
||||
.format(vtx, inst, view))
|
||||
|
||||
|
||||
Reference in New Issue
Block a user