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baldurk
768e812e45
* On windows it's strongly desired to be able to compile straight out of a clean checkout or source download. This means anyone can download the source and investigate something quickly, without having to worry about the hassle of figuring out how the project downloads 3rd party dependencies, fetching them, getting them registered in the right place. * This can't be put in a submodule as git submodules don't get downloaded by default so people new to git will get confusing compilation messages, and someone downloading the source from github directly without cloning via git won't get submodules included. * It does add some extra size to a fresh download/checkout which is unfortunate, but absolutely worth the cost. Shallow checkouts still aren't unfeasibly large, and it's only a one-off cost at clone time.
251 lines
7.9 KiB
C
251 lines
7.9 KiB
C
#ifndef Py_ATOMIC_H
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#define Py_ATOMIC_H
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#ifdef Py_BUILD_CORE
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#include "dynamic_annotations.h"
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#include "pyconfig.h"
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#if defined(HAVE_STD_ATOMIC)
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#include <stdatomic.h>
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#endif
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/* This is modeled after the atomics interface from C1x, according to
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* the draft at
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* http://www.open-std.org/JTC1/SC22/wg14/www/docs/n1425.pdf.
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* Operations and types are named the same except with a _Py_ prefix
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* and have the same semantics.
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*
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* Beware, the implementations here are deep magic.
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*/
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#if defined(HAVE_STD_ATOMIC)
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typedef enum _Py_memory_order {
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_Py_memory_order_relaxed = memory_order_relaxed,
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_Py_memory_order_acquire = memory_order_acquire,
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_Py_memory_order_release = memory_order_release,
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_Py_memory_order_acq_rel = memory_order_acq_rel,
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_Py_memory_order_seq_cst = memory_order_seq_cst
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} _Py_memory_order;
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typedef struct _Py_atomic_address {
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atomic_uintptr_t _value;
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} _Py_atomic_address;
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typedef struct _Py_atomic_int {
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atomic_int _value;
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} _Py_atomic_int;
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#define _Py_atomic_signal_fence(/*memory_order*/ ORDER) \
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atomic_signal_fence(ORDER)
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#define _Py_atomic_thread_fence(/*memory_order*/ ORDER) \
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atomic_thread_fence(ORDER)
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#define _Py_atomic_store_explicit(ATOMIC_VAL, NEW_VAL, ORDER) \
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atomic_store_explicit(&(ATOMIC_VAL)->_value, NEW_VAL, ORDER)
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#define _Py_atomic_load_explicit(ATOMIC_VAL, ORDER) \
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atomic_load_explicit(&(ATOMIC_VAL)->_value, ORDER)
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/* Use builtin atomic operations in GCC >= 4.7 */
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#elif defined(HAVE_BUILTIN_ATOMIC)
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typedef enum _Py_memory_order {
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_Py_memory_order_relaxed = __ATOMIC_RELAXED,
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_Py_memory_order_acquire = __ATOMIC_ACQUIRE,
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_Py_memory_order_release = __ATOMIC_RELEASE,
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_Py_memory_order_acq_rel = __ATOMIC_ACQ_REL,
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_Py_memory_order_seq_cst = __ATOMIC_SEQ_CST
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} _Py_memory_order;
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typedef struct _Py_atomic_address {
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uintptr_t _value;
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} _Py_atomic_address;
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typedef struct _Py_atomic_int {
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int _value;
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} _Py_atomic_int;
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#define _Py_atomic_signal_fence(/*memory_order*/ ORDER) \
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__atomic_signal_fence(ORDER)
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#define _Py_atomic_thread_fence(/*memory_order*/ ORDER) \
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__atomic_thread_fence(ORDER)
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#define _Py_atomic_store_explicit(ATOMIC_VAL, NEW_VAL, ORDER) \
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(assert((ORDER) == __ATOMIC_RELAXED \
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|| (ORDER) == __ATOMIC_SEQ_CST \
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|| (ORDER) == __ATOMIC_RELEASE), \
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__atomic_store_n(&(ATOMIC_VAL)->_value, NEW_VAL, ORDER))
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#define _Py_atomic_load_explicit(ATOMIC_VAL, ORDER) \
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(assert((ORDER) == __ATOMIC_RELAXED \
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|| (ORDER) == __ATOMIC_SEQ_CST \
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|| (ORDER) == __ATOMIC_ACQUIRE \
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|| (ORDER) == __ATOMIC_CONSUME), \
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__atomic_load_n(&(ATOMIC_VAL)->_value, ORDER))
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#else
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typedef enum _Py_memory_order {
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_Py_memory_order_relaxed,
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_Py_memory_order_acquire,
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_Py_memory_order_release,
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_Py_memory_order_acq_rel,
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_Py_memory_order_seq_cst
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} _Py_memory_order;
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typedef struct _Py_atomic_address {
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uintptr_t _value;
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} _Py_atomic_address;
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typedef struct _Py_atomic_int {
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int _value;
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} _Py_atomic_int;
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/* Only support GCC (for expression statements) and x86 (for simple
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* atomic semantics) for now */
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#if defined(__GNUC__) && (defined(__i386__) || defined(__amd64))
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static __inline__ void
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_Py_atomic_signal_fence(_Py_memory_order order)
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{
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if (order != _Py_memory_order_relaxed)
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__asm__ volatile("":::"memory");
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}
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static __inline__ void
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_Py_atomic_thread_fence(_Py_memory_order order)
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{
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if (order != _Py_memory_order_relaxed)
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__asm__ volatile("mfence":::"memory");
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}
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/* Tell the race checker about this operation's effects. */
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static __inline__ void
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_Py_ANNOTATE_MEMORY_ORDER(const volatile void *address, _Py_memory_order order)
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{
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(void)address; /* shut up -Wunused-parameter */
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switch(order) {
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case _Py_memory_order_release:
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case _Py_memory_order_acq_rel:
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case _Py_memory_order_seq_cst:
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_Py_ANNOTATE_HAPPENS_BEFORE(address);
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break;
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case _Py_memory_order_relaxed:
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case _Py_memory_order_acquire:
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break;
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}
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switch(order) {
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case _Py_memory_order_acquire:
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case _Py_memory_order_acq_rel:
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case _Py_memory_order_seq_cst:
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_Py_ANNOTATE_HAPPENS_AFTER(address);
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break;
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case _Py_memory_order_relaxed:
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case _Py_memory_order_release:
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break;
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}
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}
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#define _Py_atomic_store_explicit(ATOMIC_VAL, NEW_VAL, ORDER) \
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__extension__ ({ \
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__typeof__(ATOMIC_VAL) atomic_val = ATOMIC_VAL; \
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__typeof__(atomic_val->_value) new_val = NEW_VAL;\
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volatile __typeof__(new_val) *volatile_data = &atomic_val->_value; \
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_Py_memory_order order = ORDER; \
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_Py_ANNOTATE_MEMORY_ORDER(atomic_val, order); \
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\
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/* Perform the operation. */ \
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_Py_ANNOTATE_IGNORE_WRITES_BEGIN(); \
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switch(order) { \
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case _Py_memory_order_release: \
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_Py_atomic_signal_fence(_Py_memory_order_release); \
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/* fallthrough */ \
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case _Py_memory_order_relaxed: \
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*volatile_data = new_val; \
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break; \
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\
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case _Py_memory_order_acquire: \
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case _Py_memory_order_acq_rel: \
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case _Py_memory_order_seq_cst: \
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__asm__ volatile("xchg %0, %1" \
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: "+r"(new_val) \
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: "m"(atomic_val->_value) \
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: "memory"); \
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break; \
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} \
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_Py_ANNOTATE_IGNORE_WRITES_END(); \
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})
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#define _Py_atomic_load_explicit(ATOMIC_VAL, ORDER) \
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__extension__ ({ \
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__typeof__(ATOMIC_VAL) atomic_val = ATOMIC_VAL; \
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__typeof__(atomic_val->_value) result; \
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volatile __typeof__(result) *volatile_data = &atomic_val->_value; \
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_Py_memory_order order = ORDER; \
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_Py_ANNOTATE_MEMORY_ORDER(atomic_val, order); \
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\
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/* Perform the operation. */ \
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_Py_ANNOTATE_IGNORE_READS_BEGIN(); \
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switch(order) { \
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case _Py_memory_order_release: \
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case _Py_memory_order_acq_rel: \
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case _Py_memory_order_seq_cst: \
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/* Loads on x86 are not releases by default, so need a */ \
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/* thread fence. */ \
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_Py_atomic_thread_fence(_Py_memory_order_release); \
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break; \
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default: \
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/* No fence */ \
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break; \
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} \
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result = *volatile_data; \
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switch(order) { \
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case _Py_memory_order_acquire: \
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case _Py_memory_order_acq_rel: \
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case _Py_memory_order_seq_cst: \
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/* Loads on x86 are automatically acquire operations so */ \
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/* can get by with just a compiler fence. */ \
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_Py_atomic_signal_fence(_Py_memory_order_acquire); \
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break; \
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default: \
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/* No fence */ \
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break; \
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} \
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_Py_ANNOTATE_IGNORE_READS_END(); \
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result; \
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})
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#else /* !gcc x86 */
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/* Fall back to other compilers and processors by assuming that simple
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volatile accesses are atomic. This is false, so people should port
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this. */
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#define _Py_atomic_signal_fence(/*memory_order*/ ORDER) ((void)0)
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#define _Py_atomic_thread_fence(/*memory_order*/ ORDER) ((void)0)
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#define _Py_atomic_store_explicit(ATOMIC_VAL, NEW_VAL, ORDER) \
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((ATOMIC_VAL)->_value = NEW_VAL)
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#define _Py_atomic_load_explicit(ATOMIC_VAL, ORDER) \
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((ATOMIC_VAL)->_value)
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#endif /* !gcc x86 */
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#endif
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/* Standardized shortcuts. */
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#define _Py_atomic_store(ATOMIC_VAL, NEW_VAL) \
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_Py_atomic_store_explicit(ATOMIC_VAL, NEW_VAL, _Py_memory_order_seq_cst)
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#define _Py_atomic_load(ATOMIC_VAL) \
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_Py_atomic_load_explicit(ATOMIC_VAL, _Py_memory_order_seq_cst)
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/* Python-local extensions */
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#define _Py_atomic_store_relaxed(ATOMIC_VAL, NEW_VAL) \
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_Py_atomic_store_explicit(ATOMIC_VAL, NEW_VAL, _Py_memory_order_relaxed)
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#define _Py_atomic_load_relaxed(ATOMIC_VAL) \
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_Py_atomic_load_explicit(ATOMIC_VAL, _Py_memory_order_relaxed)
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#endif /* Py_BUILD_CORE */
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#endif /* Py_ATOMIC_H */
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