Commit Graph

15370 Commits

Author SHA1 Message Date
Jake Turner 052961ea08 Added DXBCContainer::GetGlobalShaderFlags() 2024-12-11 14:36:09 +00:00
Jake Turner daa0392170 Extend D3D12 GetShaderBlob() to allow passing arbitrary compile options
Pass via ShaderCompileFlag with name "@compile_option" and value is the compile option to add

Added helper to return D3D12 Shader Cache m_CompileFlags
2024-12-11 14:34:40 +00:00
Jake Turner cfa392e279 DXIL Debugger handle Half types in GatherPSInputDataForInitialValues() 2024-12-11 14:25:50 +00:00
Jake Turner 8679f8a9ba DXIL Debugger handle Half types in GetInterpolationModeForInputParam() 2024-12-11 14:25:10 +00:00
Jake Turner b6dca8fb47 DXIL Debugger do not flush denorm for Half types 2024-12-11 14:24:39 +00:00
Jake Turner 6fddc34077 DXIL Debugger support for DXOp::IMul, DXOp::UMul, DXOp::UDiv
Prevent divide by zero for integer divides. Set GeneratedNanOrInf for divide by zero.
2024-12-11 06:55:59 +00:00
Jake Turner a40d729bbe Use mad() intrinsic in D3D12_Shader_Debug_Zoo SM6+ tests 2024-12-10 17:36:30 +00:00
Jake Turner ae7159fc63 DXIL Debugger support for DXOp::IMad, DXOp::UMad 2024-12-10 17:36:26 +00:00
Jake Turner 3ada6022e1 DXIL Debugger support for Operation::CompareExchange 2024-12-10 16:39:35 +00:00
baldurk 4f7dd54d9e Fix file encoding error in nvapi header 2024-12-10 15:16:19 +00:00
Friedrich Vock eab775181a Always pass CAPTURE_REPLAY RT pipeline create flags
This is required for RT pipelines when capture/replay handles are used,
both during capture and replay.
2024-12-10 15:16:08 +00:00
Friedrich Vock 6a761c2196 Enable RT pipeline capture/replay feature alongside RT pipelines
Required for using capture/replay shader handles.
2024-12-10 15:16:08 +00:00
Jake Turner 06047f10dd DXIL Debugger support for DXOp::AtomicCompareExchange 2024-12-10 13:50:40 +00:00
Jake Turner 8138a632f2 DXIL Debugger support for DXOp::AtomicBinOp 2024-12-10 13:49:02 +00:00
Jake Turner 8de06cf324 D3D12 Shader Debug Zoo : add a test for UAV Interlocked*
RWTexture<int>

InterlockedAdd
InterlockedAnd
InterlockedOr
InterlockedXor
InterlockedMin
InterlockedMax
InterlockedCompareExchange
InterlockedCompareStore
InterlockedExchange
2024-12-10 13:46:47 +00:00
Jake Turner 8f75a1658f DXIL Debugger treat global variables as always in scope 2024-12-10 11:38:26 +00:00
Jake Turner 9e0e25a576 DXIL Debugger save previous block, Phi Variables for Operation::Switch 2024-12-10 06:21:35 +00:00
Jake Turner 24faca1ae9 DXIL Debugger ignore global variable zeroinitializer
The backing memory is initialised to zero on creation
2024-12-10 06:21:35 +00:00
baldurk 9d32418e33 Fix GL_Buffer_Updates to not rely on exact thumbnail 2024-12-10 00:06:39 +00:00
baldurk 8cabf9eaf0 Use dedicated lists and allocators for overlay to reset them 2024-12-09 16:19:20 +00:00
baldurk aa30ac2c10 Don't overlap storage with multiple inline UBO updates in one template
* Previously we were writing the inline UBO data to the same byte storage
  meaning the last update's data would write over all updates.
2024-12-09 16:19:20 +00:00
baldurk 0e406b0e4d Fix some issues with descriptor display with inline UBOs 2024-12-09 16:19:20 +00:00
baldurk c4caa7395c Keep GPUBuffer fully unwrapped to avoid problems during capture 2024-12-09 16:19:20 +00:00
Jake Turner ca5c0e8a3e DXIL ControlFlow optimisations
Lazy evaluate the connections map
2024-12-09 15:31:11 +00:00
Jake Turner 89c5724477 DXIL Debugger support for TextureStore 2024-12-09 15:31:11 +00:00
Jake Turner 23c7e1cfea D3D12 Shader Debug Zoo : add a test for Texture2D Store 2024-12-09 14:35:49 +00:00
Jake Turner 0fcecf0a15 D3D12_Shader_Debug_Zoo only do 16bit tests if runtime supports it
Check using Native16BitShaderOpsSupported
2024-12-09 12:50:43 +00:00
baldurk acc29c9291 Use unwrapped memory map/unmap functions for GPUBuffer
* If we use the wrapped functions this can deadlock on the CapTransitionLock
  when using GPUBuffers during capture.
2024-12-06 16:25:08 +00:00
baldurk bc5bd00205 Cap oversized soft-memory allocations at 512MB
* This allows a larger soft-memory limit without allocating too much memory in
  one block, but still allows low soft-memory limits to cap the size of memory
  blocks.
2024-12-06 16:25:08 +00:00
baldurk 9703cf23e3 Don't use BeginQuery/EndQuery to initialise AS queries 2024-12-06 15:59:22 +00:00
baldurk 1e977fe889 Use configurable overestimate to account for incorrect maxVertex
* We do this already on D3D12, this applies the same change to Vulkan -
  maxVertex can't really be trusted but we hope it is approximately right or the
  VBs are small, we don't want to copy the whole VB since it may be massive.
2024-12-06 15:59:22 +00:00
baldurk ab6381319f Skip options5 entirely
* No longer modifying this one.
2024-12-06 13:38:49 +00:00
baldurk 8de3242825 Enable all features in options5 2024-12-06 13:38:48 +00:00
Jake Turner c85835ce4b Enable DXIL Debugging
Remove config option D3D12_Experimental_EnableDXILShaderDebugging
2024-12-06 11:13:29 +00:00
Jake Turner f7cc72c9da DXIL Debugger change SSA lifetime to use block and instruction index
Use control flow to determine the ordering of ExectionPoint's (block + instruction index)
Can't use pure instruction index because programs do not have to have linear flow and monotonically increasing instruction index
Can assign to an SSA ID at an instruction index larger than when the SSA ID is accessed, as long as the assignment occurs before the access in control flow (block) ordering
SSA ID assignments inside loop blocks are considered to be live until the next uniform block after the loop block the SSA ID assignment occurs in
2024-12-06 11:13:28 +00:00
Jake Turner 933772c3ec DXIL ControlFlow Updates added IsForwardConnection()
Cache 2D bool array of IsBlock B in any path ahead of Block A
2024-12-06 11:13:28 +00:00
Jake Turner 2e6368e6c2 DXIL ControlFlow optimisations, new APIs
Use rdcarray instead of unordered_map, unordered_set for hot containers
Made struct public and added new APIs

rdcarray<uint32_t> GetUniformBlocks();
rdcarray<uint32_t> GetLoopBlocks();
uint32_t GetNextUniformBlock(uint32_t from);
2024-12-06 11:13:28 +00:00
Jake Turner 4102b66ec0 DXIL Debugger Added m_Assigned container
To track/assert if an SSA ID is used before it has been assigned
2024-12-06 11:13:28 +00:00
Jake Turner 93bba6375d DXIL disassembly custom decode asint(), asfloat()
Before:
int _1374 = (int)(_1364); // bitcast
float _1377 = (float)(_1376); // bitcast

After:
int _1374 = asint(_1364); // bitcast
float _1377 = asfloat(_1376); // bitcast
2024-12-06 11:13:28 +00:00
baldurk 87547d6074 x86 compile fix 2024-12-06 11:04:19 +00:00
baldurk 70c6dd32a2 Implement auditing of indirect RT dispatches 2024-12-05 13:31:35 +00:00
baldurk bdd479a5d4 Use RT indirect estimate directly 2024-12-05 13:31:23 +00:00
baldurk 3366b25f0d Add appropriate barriers for indirect RT arguments during patching 2024-12-05 13:31:23 +00:00
baldurk dcf9ef00dc Fix missing flag to indicate that indirect count buffer is unused 2024-12-05 13:31:23 +00:00
baldurk e2f67eb9f6 Ignore a couple of DXBC chunks without processing or warning 2024-12-05 13:31:23 +00:00
baldurk a26e599c02 Rebase addresses to current form in indirect ray dispatches 2024-12-05 13:31:23 +00:00
baldurk 9d698acbf4 Reset lod bias on GL when rendering textures internally 2024-12-05 13:31:23 +00:00
baldurk 4bc41a6296 Fix nv aftermath include order 2024-12-05 13:31:23 +00:00
baldurk 9bc648cf3b Fix fetching DRED contexts
* Though these are broken as they are not properly processing BeginEvent strings
  which are not packed/encoded
2024-12-05 13:31:23 +00:00
baldurk 72fffe4cf2 Run patching for indirect RT executes while auditing, but don't execute 2024-12-05 13:31:23 +00:00