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Author SHA1 Message Date
Jake Turner d0bbdc3143 Add "DXC DXIL" disassembly target 
Default to using DXBC/DXIL disassembly target which shows RD DXIL disassembly
"DXC DXIL" disassembly target shows the DXC style DXIL disassembly which was the default in RenderDoc before the RD DXIL disassembly view existed
 2024-05-06 12:39:40 +01:00
Jake Turner 76aa3b026d RD DXIL Disassembly: tweak display of resources 
Show resources as part of entry point decoding instead of outside
Format resource display in a more HLSL source way

Example output:

Inputs
  float4 SV_Position;
  float3 WorldPos;
  float2 TexCoord0;
  float3 TexCoord1;
  float3 TexCoord2;
  float3 Normal;
  float3 Tangent;
  float3 Bitangent;

Outputs
  float3 SV_Target0;
  float3 SV_Target1;

StructuredBuffer<struct.LightData> Buffer : register(t14, space0);
Texture2DArray<float> ArrayTex : register(t15, space0);
ByteAddressBuffer<int> Grid : register(t16, space0);
Texture2D<float3> Diffuse : register(t0, space0);
Texture2D<float3> Specular : register(t1, space0);
Texture2D<float3> Normal : register(t3, space0);
Texture2D<float> SSAO : register(t12, space0);
Texture2D<float> Shadow : register(t13, space0);

cbuffer PSConstants : register(b0, space0)
{
  float3 Direction;
  float4 TexelSize;
  int4 CountTiles;
  int4 IndexLight;
};

int defaultSampler : register(s10, space0);
int shadowSampler : register(s11, space0);
 2024-05-06 12:08:31 +01:00
Jake Turner 30e32b6a62 RD DXIL Disassembly: hand edit funcNamSigs 
remove parameter names from functions when it is clear what the parameter(s) mean i.e.

FAbs(value) -> FAbs()
FMax(a,b) -> FMax()
 2024-05-06 12:08:25 +01:00
Jake Turner 03be4a7973 RD DXIL Disassembly: decode "dx.op.dot[234]" 
Example Output

%37 = call float @dx.op.dot2.f32(i32 54, float %12, float %15, float %18, float %21)
%39 = call float @dx.op.dot3.f32(i32 55, float %18, float %21, float %24, float %27, float %30, float %33)
%41 = call float @dx.op.dot4.f32(i32 56, float %27, float %30, float %33, float %36, float %12, float %12, float %12, float %12)

Becomes:

float _37 = dot({_12, _15}, {_18, _21});
float _39 = dot({_18, _21, _24}, {_27, _30, _33});
float _41 = dot({_27, _30, _33, _36}, {_12, _12, _12, _12});
 2024-05-06 12:08:21 +01:00
Jake Turner 0d3c118666 RD DXIL Disassembly: decode "dx.op.atomicBinOp" 
Example Output

%AtomicAdd = call i32 @dx.op.atomicBinOp.i32(i32 78, %dx.types.Handle %Histogram_UAV_rawbuf, i32 0, i32 %16, i32 undef, i32 undef, i32 %15)

Becomes

int _AtomicAdd = Histogram.InterlockedAdd({_16}, _15);
 2024-05-06 06:57:59 +01:00
Jake Turner 1b351968fa Added DXIL::AtomicBinOpCode enum and DoStringise 2024-05-06 06:57:59 +01:00
Jake Turner 68b757aab6 Add more entries to DXOp enum 
Use the DXOp enum instead of hard coded values in RD DXIL Disassembly
 2024-05-06 06:57:59 +01:00
Jasmine Hansen 20f0d6870b Add function hooks for VK_EXT_shader_object 
Functions that are provided by VK_EXT_shader_object as well as other extensions are declared as an OR of both extensions in the macro.

Added a new feature boolean: m_ShaderObject to WrappedVulkan that can be checked against wherever the dynamic state booleans are used.

Co-authored-by: James Sumihiro <james.sumihiro@ntd.nintendo.com>
 2024-05-04 08:58:33 +01:00
Jasmine Hansen 0b0d8b4703 Add serialization of VK_EXT_shader_object types 2024-05-04 08:58:33 +01:00
baldurk 71d3e41fbf Fix delete that should be release 2024-05-02 19:17:57 +01:00
baldurk f8b5c42100 Add a command line argument to the demos project to load a DLL 
* We also automatically check for a DLL under /D3D12/ next to the executable
 2024-05-02 18:30:46 +01:00
baldurk 87a905b0e6 Add support for capturing programs using new D3D12 DLL selection API 
* We also use it for replay when available instead of self-function-hooking
 2024-05-02 18:10:57 +01:00
Jake Turner 2b0d898b34 RD DXIL Disassembly: add "ssaAliases" container 
Used to display dx.op function arguments with a different string.
The resource handles store the resource name as an SSA register alias.
 2024-05-02 10:58:23 +01:00
Jake Turner d71496aabc RD DXIL Disassembly: decode "dx.op.sample*" 
Example Output

%25 = call %dx.types.ResRet.f32 @dx.op.sample.f32(i32 60, %dx.types.Handle %texDiffuse_texture_2d, %dx.types.Handle %defaultSampler_sampler, float %16, float %17, float undef, float undef, i32 0, i32 0, i32 undef, float undef)

Becomes

_dx.types.ResRet.f32 _25 = texDiffuse.Sample(defaultSampler, _16, _17, Offset = {0, 0});
 2024-05-02 10:07:28 +01:00
Jake Turner 91f19a9ed5 RD DXIL Disassembly: merged funcNames and funcSigs together 
Makes development simpler to be able to see parameter names with function names
 2024-05-02 10:07:28 +01:00
Jake Turner 13ccbe2b84 RD DXIL Disassembly: decode "dx.op.textureStore" 
Example Output

call void @dx.op.textureStore.f32(i32 67, %dx.types.Handle %OutLuma_UAV_2d, i32 %1, i32 %2, i32 undef, float %18, float %18, float %18, float %18, i8 15)

Becomes

OutLuma[_1, _2] = {_18, _18, _18, _18};
 2024-05-02 07:09:49 +01:00
Jake Turner d1150f244f RD DXIL Disassembly: decode "dx.op.textureLoad" 
Example Output

%TextureLoad = call %dx.types.ResRet.f32 @dx.op.textureLoad.f32(i32 66, %dx.types.Handle %texSSAO_texture_2d, i32 0, i32 %23, i32 %24, i32 undef, i32 undef, i32 undef, i32 undef)
Becomes

_dx.types.ResRet.f32 _TextureLoad = texSSAO.Load(_23, _24);
 2024-05-02 07:09:43 +01:00
Jake Turner e6bf418c30 RD DXIL Disassembly: decode "dx.op.bufferStore" &"dx.op.rawBufferStore" 
Example Output

call void @dx.op.rawBufferStore.f32(i32 140, %dx.types.Handle %Exposure_UAV_structbuf, i32 1, i32 0, float %75, float undef, float undef, float undef, i8 1, i32 4)
call void @dx.op.rawBufferStore.f32(i32 140, %dx.types.Handle %Exposure_UAV_structbuf, i32 2, i32 0, float %FMin, float undef, float undef, float undef, i8 1, i32 4)
call void @dx.op.rawBufferStore.f32(i32 140, %dx.types.Handle %Exposure_UAV_structbuf, i32 3, i32 0, float %59, float undef, float undef, float undef, i8 1, i32 4)

Becomes

Exposure[1] = {_75};
Exposure[2] = {_FMin};
Exposure[3] = {_59};
 2024-05-02 07:09:38 +01:00
Jake Turner 30cf5412ba RD DXIL Disassembly: decode "dx.op.bufferLoad" &"dx.op.rawBufferLoad" 
Example Output

%31 = call %dx.types.ResRet.i32 @dx.op.bufferLoad.i32(i32 68, %dx.types.Handle %bufOut_UAV_structbuf, i32 1, i32 0);

Becomes

_dx.types.ResRet.i32 _31 = bufOut[1];
 2024-05-01 15:58:04 +01:00
Jake Turner 70c5fd91ad RD DXIL Disassembly: handle non-constant args during specifc decoding 
dx.op.loadInput
dx.op.storeOutput
dx.op.createHandle
dx.op.cbufferLoad
dx.op.cbufferLoadLegacy
 2024-05-01 14:52:46 +01:00
Jake Turner 99e10f24c7 RD DXIL Disassembly: decode "dx.op.cbufferLoad*" to show members 
CBuffer[0] blah Space: 0 Reg: 0 Count: 1
{
  int4 mult;
};

Example Output

_dx.types.CBufRet.i32 %1 = CBufferLoadLegacy(%blah_cbuffer, 0);

becomes

_dx.types.CBufRet.i32 _1 = {blah.mult};
 2024-05-01 14:52:46 +01:00
Jake Turner 9b97fa5ed0 RD DXIL Disassembly: improve presentation of Inputs and Outputs 
Handle Inputs and Outputs which have multiple rows
Prefix Inputs with "<IN>."
Prefix Outputs with "<OUT>."
Inputs and Outputs can share the same names (semantic names) i.e. COLOR, INTERPOLATOR
 2024-05-01 10:26:14 +01:00
Jake Turner 18b655edf5 RD DXIL Disassembly refactoring 
Renamed:
DXIL::EntryPoint -> DXIL::EntryPointInterface
DXIL::Program::FetchEntryPoints() -> DXIL::Program::FetchEntryPointInterfaces()
Deleted EntryPointsInfo helper struct
 2024-05-01 08:07:27 +01:00
Jake Turner 4d10322908 RD DXIL Disassembly: decode "dx.op.createHandle" to show resource name 2024-05-01 08:05:29 +01:00
Jake Turner 01519c7b49 OpDebugValue handling improve offset for nested complex types 
Use member offset data from DebugTypeComposite for member offsets
Use type dimensions to compute offset for children
Propagate the parent offset as a base for the children to offset from
 2024-05-01 07:45:11 +01:00
Jake Turner 3852d21aa5 OpDebugValue handling added asserts to catch invalid indexes 2024-05-01 07:45:11 +01:00
baldurk dc8c758a55 Dynamically allocate BC7 data only when needed 2024-04-30 18:28:33 +01:00
baldurk 0dfb8474c1 Re-use ray dispatch patching on replay 2024-04-30 18:28:33 +01:00
baldurk ffb9c6cb3b Rebase associations after patching state object desc 2024-04-30 18:28:33 +01:00
baldurk b06e7030a5 Implement GPU unwrapping of handles in shader records 2024-04-30 18:28:33 +01:00
baldurk a9849c050b Implement shader identifier patching during capture 2024-04-30 18:28:33 +01:00
baldurk cfc5204a69 Don't require dxc for compiling RT patching shaders 
* We do some manual uint64 emulation with uint2 which compiles on fxc, re-used
  from the execute indirect patching.
 2024-04-30 18:28:33 +01:00
baldurk c26c4b11d0 Set up a patching function to unwrap shader records during capture 2024-04-30 18:28:33 +01:00
baldurk db44d06d41 Manage internal GPU buffers as refcounted objects on D3D12 
* This will enable sharing of these buffers more easily when there are multiple
  lifetimes that are more difficult to co-ordinate.
 2024-04-30 18:28:33 +01:00
baldurk 34aba75128 Register local root signatures and databases of state object exports 
* This information will be used for wrapping, unwrapping & replay-remapping of
  shader records
 2024-04-30 18:28:33 +01:00
baldurk 4c3de55d20 Dynamic rendering can be started in any command buffer 2024-04-30 10:40:39 +01:00
baldurk 47c5773d08 Fix crash in vulkan pipeline state viewer 2024-04-30 09:50:34 +01:00
Cam Mannett d0e3d9ce6d Vulkan AS descriptor and SPIR-V changes 
Also has change where the AS is tracked in command buffers so that we know when it has been built - unbuilt ASes are skipped before serialisation.
 2024-04-29 11:46:56 +01:00
Jake Turner 6de42041e6 Remove compile option "-mfpu=neon-vfpv" on arm64 processors 
The compile option is set for file "rdparty/stb/stb_impl.c".
Apple Silicon is an arm64 processor and the compile option was not valid.
 2024-04-27 11:58:44 +01:00
baldurk f076105548 Add missing docstrings for ShaderStageMask 2024-04-26 14:43:31 +01:00
baldurk aa419f851b Don't pass rdcstr through to logging directly 2024-04-26 14:36:18 +01:00
baldurk aa4f8fe62b Update SPIR-V references to NV opcodes 2024-04-26 14:25:45 +01:00
baldurk ce7a23b611 Prefer KHR to NV for opcode aliases when making SPIR-V helpers 2024-04-26 13:55:19 +01:00
baldurk c098971f79 Serialise ray pipeline binding and dispatching as-is 
* This does not contain patching of shader records so currently the ray dispatch
  is not replayed
 2024-04-26 13:55:19 +01:00
baldurk caa6ba3dd1 Remove an old and redundant feature check 2024-04-26 13:55:19 +01:00
baldurk e3e191f8d6 Wrap and serialise state objects as pass-through 2024-04-26 13:55:19 +01:00
baldurk 7e7bbf58a8 Reflect multiple entry points & ray properties from DXIL shaders 2024-04-26 13:55:19 +01:00
baldurk 476fed06d6 Add function to enumerate the entry points in a given shader 2024-04-26 13:55:19 +01:00
baldurk 89bea3ea8b Add new shader enums for RT shader stages 2024-04-26 13:55:18 +01:00
Jake Turner 5366ce7b4a RD DXIL Disassembly: ignore "undef" parameters in "dx.op" functions 2024-04-26 08:18:20 +01:00