db44d06d41
Manage internal GPU buffers as refcounted objects on D3D12
...
* This will enable sharing of these buffers more easily when there are multiple
lifetimes that are more difficult to co-ordinate.
2024-04-30 18:28:33 +01:00
34aba75128
Register local root signatures and databases of state object exports
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* This information will be used for wrapping, unwrapping & replay-remapping of
shader records
2024-04-30 18:28:33 +01:00
4c3de55d20
Dynamic rendering can be started in any command buffer
2024-04-30 10:40:39 +01:00
47c5773d08
Fix crash in vulkan pipeline state viewer
2024-04-30 09:50:34 +01:00
d0e3d9ce6d
Vulkan AS descriptor and SPIR-V changes
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Also has change where the AS is tracked in command buffers so that we know when it has been built - unbuilt ASes are skipped before serialisation.
2024-04-29 11:46:56 +01:00
6de42041e6
Remove compile option "-mfpu=neon-vfpv" on arm64 processors
...
The compile option is set for file "rdparty/stb/stb_impl.c".
Apple Silicon is an arm64 processor and the compile option was not valid.
2024-04-27 11:58:44 +01:00
f076105548
Add missing docstrings for ShaderStageMask
2024-04-26 14:43:31 +01:00
aa419f851b
Don't pass rdcstr through to logging directly
2024-04-26 14:36:18 +01:00
aa4f8fe62b
Update SPIR-V references to NV opcodes
2024-04-26 14:25:45 +01:00
ce7a23b611
Prefer KHR to NV for opcode aliases when making SPIR-V helpers
2024-04-26 13:55:19 +01:00
c098971f79
Serialise ray pipeline binding and dispatching as-is
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* This does not contain patching of shader records so currently the ray dispatch
is not replayed
2024-04-26 13:55:19 +01:00
caa6ba3dd1
Remove an old and redundant feature check
2024-04-26 13:55:19 +01:00
e3e191f8d6
Wrap and serialise state objects as pass-through
2024-04-26 13:55:19 +01:00
7e7bbf58a8
Reflect multiple entry points & ray properties from DXIL shaders
2024-04-26 13:55:19 +01:00
476fed06d6
Add function to enumerate the entry points in a given shader
2024-04-26 13:55:19 +01:00
89bea3ea8b
Add new shader enums for RT shader stages
2024-04-26 13:55:18 +01:00
5366ce7b4a
RD DXIL Disassembly: ignore "undef" parameters in "dx.op" functions
2024-04-26 08:18:20 +01:00
756a980d96
RD DXIL Disassembly: ignore first getelemenptr index if it is zero
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Before
GroupShared float* _30 = shared_pos[0] + _29;
After
GroupShared float* _30 = shared_pos[_29];
2024-04-26 06:18:16 +01:00
b8f77d8393
RD DXIL Disassembly: EntryPoint Resources output
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Includes EntryPoint Resources parsing
Includes handling column index for inputs/outputs access
2024-04-25 18:42:20 +01:00
b8621e81d5
Add SignatureElement constants used when parsing DXIL Signatures
2024-04-24 13:37:51 +01:00
6a329ba5b3
RD DXIL Disassembly: display DX parameter names as inline comment
2024-04-24 09:33:21 +01:00
8b534e8f18
Demos: Fix validation errors in D3D12_Compute_Only
2024-04-24 09:02:32 +01:00
ec9517c43a
RD DXIL Disassembly: show dx parameter names on dx.op function calls
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The parameter names extracted from the dx function signatures
2024-04-24 07:49:06 +01:00
2b59d21fd9
RD DXIL Disassembly: change getelementptr output
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Convert the DXIL addrspace value into string
Hand de-mangle pointer name
DXC:
%3 = getelementptr [6 x float], [6 x float] addrspace(3)* @"\01?s_x@@3@$$A.1dim", i32 0, i32 %9
RD:
GroupShared float* _3 = s_x[0] + _9;
2024-04-24 07:01:31 +01:00
601dc58a52
RD DXIL Disassembly: change "br" output
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if (_32) goto _132 else goto _33;
or
goto _132;
2024-04-23 13:33:16 +01:00
007f4d46f4
RD DXIL Disassembly: change "load" and "store" output
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load
float _49 = *_48; // align 4
store
*_30 = _27; // align 4
2024-04-23 13:33:10 +01:00
248a2383ed
RD DXIL Disassembly: convert "select" to C-style ? operator
2024-04-23 11:23:24 +01:00
bdc0a0bc2d
RD DXIL Disassembly: explicit handling for specific FP comparisons
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FOrdFalse
FOrdTrue
FOrd
FUnord
2024-04-23 11:23:20 +01:00
9bb9c4ba6e
RD DXIL Disassembly: use C-style operators and function names
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Use C-style operators and function names as much as possible to replace comparison, arithmetic, casting instructions
2024-04-23 10:28:01 +01:00
0f2c7490ce
RD DXIL Disassembly: display function name instead of full signature
...
Divide up "funcSigs" array into "name" and "signature" arrays
2024-04-23 07:10:14 +01:00
53e76cfa86
RD DXIL Disassembly: do not show Op flags string
2024-04-23 07:10:08 +01:00
f27659e902
RD DXIL disassebmly: do not show types on parameters
2024-04-23 07:10:03 +01:00
a9ead1dc0a
RD DXIL disassebmly: display C style type names
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i1 -> bool
i8 -> int8
i16 -> short
i32 -> int
i64 -> long
2024-04-23 07:09:56 +01:00
a8ccb73de8
First version of RenderDoc DXIL Disassembly output
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Shows entry point inputs & outputs
Decodes "dx.op.loadInput" and "dx.op.StoreOutput" to show the input/output name
Change identifier prefix to "_" instead of "%"
Print floats in more natural format using %#g
Print type before assignments
2024-04-22 17:20:26 +01:00
86ce562594
Use STAT dxil module for reflection where possible/necessary
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* The STAT module has some metadata unstripped which is useful for type
annotations. It's better than plain stripped DXIL but not as good as ILDB.
2024-04-22 16:21:51 +01:00
edcc7f7bbf
Fix a couple of differences from dxc disassembly
2024-04-22 16:21:51 +01:00
7c656e4881
Add DisassemblyAddNewLine() to make code simpler
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Also keeps the current instruction line updated via new member
int m_DisassemblyInstructionLine;
2024-04-22 14:47:26 +01:00
72095b8302
Create proper NULL descriptors for empty bindings in reflection zoo
2024-04-22 13:44:46 +01:00
c244c1fdda
Don't process unused bindings when debugging vulkan shaders
...
* These will not be in the reflection data, so we can't try to process them and
fill out their variables as there won't be anything to map to.
* Signature elements which are 'unused' by not being referenced but are present
in a pre-1.4 SPIR-V module will be considered used still.
2024-04-22 13:01:13 +01:00
020efd7fd7
Set subpass explicitly to 0 when using loadRPs
2024-04-22 13:01:13 +01:00
f03d73108f
Add sorting offsets for arrays in SPDB source mapping data
2024-04-22 13:01:12 +01:00
124218c6a3
Fix typo cutting off some of DXIL disassembly
2024-04-22 13:01:12 +01:00
5cfff389fe
SPIRV debug mapping updates to handle multiple overlapping mappings
...
Capture the mappings into a type usage tree
Update elements of the tree as overlapping mappings are encountered, sub-elements of a previously mapped variable i.e. single component of a vector, single array element, member in a structure.
After processing all mappings convert the finalized type usage tree into source variable mappings.
2024-04-22 12:52:12 +01:00
6532eb65f0
SPIRV debug mapping change the superseding detection
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Loop over the scope downwards (parent -> child) then inside that loop iterate upwards from the current scope (child -> parent) to detect mappings which might be superseded
2024-04-22 12:52:12 +01:00
cf66943092
SPIRV debugging: store the arrayDimensions for DebugTypeArray
2024-04-22 12:52:12 +01:00
d785eaeb67
Update struct member and array element names of SPIRV constants
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array names and struct member names are not set when constants are created (struct decoration data is not available)
2024-04-22 12:52:12 +01:00
f494bb3cb9
Handle NULL signatures in DXIL EntryPoint
2024-04-22 12:08:31 +01:00
c2100ed816
Add DXIL 1.8 opcodes to funcSigs
...
Generated using DirectShaderCompile python file "utils/hct/hctdb.py"
for inst in db.instr:
out = inst.name
out += "("
for i in range(2,len(inst.ops)):
if i > 2:
out += ","
op = inst.ops[i]
out += op.name
out += ")"
print(out)
2024-04-22 11:47:32 +01:00
218e52d0bb
Move files to the 3rdparty/glslang filter in renderdoc_spirv vcproj
2024-04-22 11:46:53 +01:00
08ed70e648
Added char DXIL::dxilIdentifier to use in the disassembly output
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Before (DXC style)
%46 = fcmp fast olt float %45, 1.000000e-06
After (RD style)
_46 = fcmp fast olt float _45, 1.00000e-06;
2024-04-22 06:41:07 +01:00
baldurk